Lines Matching +full:stop +full:- +full:mode
6 * SPDX-License-Identifier: GPL-2.0-or-later
11 #include "hw/qdev-properties.h"
56 g_free(payload->data); in pnv_spi_xfer_buffer_free()
63 if (payload->len < (offset + length)) { in pnv_spi_xfer_buffer_write_ptr()
64 payload->len = offset + length; in pnv_spi_xfer_buffer_write_ptr()
65 payload->data = g_realloc(payload->data, payload->len); in pnv_spi_xfer_buffer_write_ptr()
67 return &payload->data[offset]; in pnv_spi_xfer_buffer_write_ptr()
77 s->regs[SPI_MM_REG]); in does_rdr_match()
79 s->regs[SPI_MM_REG]); in does_rdr_match()
82 GETFIELD(PPC_BITMASK(48, 63), s->regs[SPI_RCV_DATA_REG]))) { in does_rdr_match()
93 * Offset is an index between 0 and PNV_SPI_REG_SIZE - 1 in get_from_offset()
97 byte = (s->regs[SPI_XMIT_DATA_REG] >> (56 - offset * 8)) & 0xFF; in get_from_offset()
124 s->regs[SPI_RCV_DATA_REG] = (s->regs[SPI_RCV_DATA_REG] << 8) | byte; in read_from_frame()
138 * - Which bytes in the payload we should move to the RDR in spi_response()
139 * - Explicit mode counter configuration settings in spi_response()
140 * - RDR full and RDR overrun status in spi_response()
147 if (rsp_payload->len != (s->N1_bytes + s->N2_bytes)) { in spi_response()
150 (s->N1_bytes + s->N2_bytes), rsp_payload->len); in spi_response()
153 trace_pnv_spi_rx_received(rsp_payload->len); in spi_response()
154 trace_pnv_spi_log_Ncounts(s->N1_bits, s->N1_bytes, s->N1_tx, in spi_response()
155 s->N1_rx, s->N2_bits, s->N2_bytes, s->N2_tx, s->N2_rx); in spi_response()
158 * that was shifted in but cannot be loaded into RDR. Bits 29-30 of in spi_response()
164 ecc_control = GETFIELD(SPI_CLK_CFG_ECC_CTRL, s->regs[SPI_CLK_CFG_REG]); in spi_response()
176 if (s->N1_rx != 0) { in spi_response()
178 shift_in_count = read_from_frame(s, &rsp_payload->data[0], in spi_response()
179 s->N1_bytes, ecc_count, shift_in_count); in spi_response()
182 if (s->N2_rx != 0) { in spi_response()
185 &rsp_payload->data[s->N1_bytes], s->N2_bytes, in spi_response()
188 if ((s->N1_rx + s->N2_rx) > 0) { in spi_response()
196 if (GETFIELD(SPI_STS_RDR_FULL, s->status) == 1) { in spi_response()
201 s->status = SETFIELD(SPI_STS_RDR_OVERRUN, s->status, 1); in spi_response()
207 s->status = SETFIELD(SPI_STS_RDR_FULL, s->status, 1); in spi_response()
223 for (int offset = 0; offset < payload->len; offset += s->transfer_len) { in transfer()
225 for (int i = 0; i < s->transfer_len; i++) { in transfer()
226 if ((offset + i) >= payload->len) { in transfer()
229 tx = (tx << 8) | payload->data[offset + i]; in transfer()
232 rx = ssi_transfer(s->ssi_bus, tx); in transfer()
233 for (int i = 0; i < s->transfer_len; i++) { in transfer()
234 if ((offset + i) >= payload->len) { in transfer()
237 *(pnv_spi_xfer_buffer_write_ptr(rsp_payload, rsp_payload->len, 1)) = in transfer()
238 (rx >> (8 * (s->transfer_len - 1) - i * 8)) & 0xFF; in transfer()
241 spi_response(s, s->N1_bits, rsp_payload); in transfer()
247 return GETFIELD(SPI_STS_SEQ_INDEX, s->status); in get_seq_index()
253 s->status = SETFIELD(SPI_STS_SEQ_INDEX, s->status, (seq_index + 1)); in next_sequencer_fsm()
254 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_INDEX_INCREMENT); in next_sequencer_fsm()
273 * Implicit mode: in calculate_N1()
275 * Forced Implicit mode: in calculate_N1()
277 * register fields. Note that we only check for forced Implicit mode when in calculate_N1()
278 * M != 0 since the mode doesn't make sense when M = 0. in calculate_N1()
279 * Explicit mode: in calculate_N1()
284 /* Explicit mode */ in calculate_N1()
285 s->N1_bits = GETFIELD(SPI_CTR_CFG_N1, s->regs[SPI_CTR_CFG_REG]); in calculate_N1()
286 s->N1_bytes = (s->N1_bits + 7) / 8; in calculate_N1()
287 s->N1_tx = 0; in calculate_N1()
288 s->N1_rx = 0; in calculate_N1()
290 if (GETFIELD(SPI_CTR_CFG_N1_CTRL_B2, s->regs[SPI_CTR_CFG_REG]) == 1) { in calculate_N1()
291 s->N1_tx = s->N1_bytes; in calculate_N1()
294 if (GETFIELD(SPI_CTR_CFG_N1_CTRL_B3, s->regs[SPI_CTR_CFG_REG]) == 1) { in calculate_N1()
295 s->N1_rx = s->N1_bytes; in calculate_N1()
298 /* Implicit mode/Forced Implicit mode, use M field from opcode */ in calculate_N1()
299 s->N1_bytes = PNV_SPI_OPCODE_LO_NIBBLE(opcode); in calculate_N1()
300 s->N1_bits = s->N1_bytes * 8; in calculate_N1()
305 s->N1_tx = s->N1_bytes; in calculate_N1()
306 s->N1_rx = 0; in calculate_N1()
307 /* Let Forced Implicit mode have an effect on the counts */ in calculate_N1()
308 if (GETFIELD(SPI_CTR_CFG_N1_CTRL_B1, s->regs[SPI_CTR_CFG_REG]) == 1) { in calculate_N1()
310 * If Forced Implicit mode and count control doesn't in calculate_N1()
314 s->regs[SPI_CTR_CFG_REG]) == 0) { in calculate_N1()
315 s->N1_tx = 0; in calculate_N1()
319 s->regs[SPI_CTR_CFG_REG]) == 1) { in calculate_N1()
320 s->N1_rx = s->N1_bytes; in calculate_N1()
332 s->regs[SPI_CLK_CFG_REG]); in calculate_N1()
334 if (s->N1_bytes > (PNV_SPI_REG_SIZE + 1)) { in calculate_N1()
337 s->N1_bytes, s->N1_bits); in calculate_N1()
338 s->N1_bytes = PNV_SPI_REG_SIZE + 1; in calculate_N1()
339 s->N1_bits = s->N1_bytes * 8; in calculate_N1()
341 } else if (s->N1_bytes > PNV_SPI_REG_SIZE) { in calculate_N1()
344 s->N1_bytes, s->N1_bits); in calculate_N1()
345 s->N1_bytes = PNV_SPI_REG_SIZE; in calculate_N1()
346 s->N1_bits = s->N1_bytes * 8; in calculate_N1()
357 bool stop = false; in operation_shiftn1() local
371 * Leave mode specific considerations in the calculate function since in operation_shiftn1()
377 trace_pnv_spi_log_Ncounts(s->N1_bits, s->N1_bytes, s->N1_tx, in operation_shiftn1()
378 s->N1_rx, s->N2_bits, s->N2_bytes, s->N2_tx, s->N2_rx); in operation_shiftn1()
384 s->N2_bits = 0; in operation_shiftn1()
385 s->N2_bytes = 0; in operation_shiftn1()
386 s->N2_tx = 0; in operation_shiftn1()
387 s->N2_rx = 0; in operation_shiftn1()
399 while (n1_count < s->N1_bytes) { in operation_shiftn1()
404 if ((s->N1_tx != 0) && (n1_count < PNV_SPI_REG_SIZE)) { in operation_shiftn1()
406 if (GETFIELD(SPI_STS_TDR_FULL, s->status) == 1) { in operation_shiftn1()
411 * that called us to stop and wait for a TDR write so we have in operation_shiftn1()
417 *(pnv_spi_xfer_buffer_write_ptr(*payload, (*payload)->len, 1)) = in operation_shiftn1()
422 * sequencer to stop and break this loop. in operation_shiftn1()
426 stop = true; in operation_shiftn1()
432 * - we are receiving during the N1 frame segment and the RDR in operation_shiftn1()
433 * is full so we need to stop until the RDR is read in operation_shiftn1()
434 * - we are transmitting and we don't care about RDR status in operation_shiftn1()
436 * - we are receiving and the RDR is empty so we allow the operation in operation_shiftn1()
439 if ((s->N1_rx != 0) && (GETFIELD(SPI_STS_RDR_FULL, in operation_shiftn1()
440 s->status) == 1)) { in operation_shiftn1()
443 stop = true; in operation_shiftn1()
447 *(pnv_spi_xfer_buffer_write_ptr(*payload, (*payload)->len, 1)) in operation_shiftn1()
462 if (!stop && (s->N1_tx != 0) && in operation_shiftn1()
463 (GETFIELD(SPI_STS_TDR_FULL, s->status) == 1)) { in operation_shiftn1()
464 s->status = SETFIELD(SPI_STS_TDR_FULL, s->status, 0); in operation_shiftn1()
467 * There are other reasons why the shifter would stop, such as a TDR empty in operation_shiftn1()
475 if (!stop && !send_n1_alone && in operation_shiftn1()
476 (GETFIELD(SPI_CTR_CFG_N2_CTRL_B0, s->regs[SPI_CTR_CFG_REG]) == 1)) { in operation_shiftn1()
478 "active, stop N1 shift, TDR_underrun set to 1"); in operation_shiftn1()
479 stop = true; in operation_shiftn1()
480 s->status = SETFIELD(SPI_STS_TDR_UNDERRUN, s->status, 1); in operation_shiftn1()
487 if (send_n1_alone && !stop) { in operation_shiftn1()
489 trace_pnv_spi_tx_request("Shifting N1 frame", (*payload)->len); in operation_shiftn1()
492 s->N2_bits = 0; in operation_shiftn1()
493 s->N2_bytes = 0; in operation_shiftn1()
494 s->N2_tx = 0; in operation_shiftn1()
495 s->N2_rx = 0; in operation_shiftn1()
499 return stop; in operation_shiftn1()
518 * Implicit mode: in calculate_N2()
520 * Forced Implicit mode: in calculate_N2()
522 * register fields. Note that we only check for Forced Implicit mode when in calculate_N2()
523 * M != 0 since the mode doesn't make sense when M = 0. in calculate_N2()
524 * Explicit mode: in calculate_N2()
529 /* Explicit mode */ in calculate_N2()
530 s->N2_bits = GETFIELD(SPI_CTR_CFG_N2, s->regs[SPI_CTR_CFG_REG]); in calculate_N2()
531 s->N2_bytes = (s->N2_bits + 7) / 8; in calculate_N2()
532 s->N2_tx = 0; in calculate_N2()
533 s->N2_rx = 0; in calculate_N2()
535 if (GETFIELD(SPI_CTR_CFG_N2_CTRL_B2, s->regs[SPI_CTR_CFG_REG]) == 1) { in calculate_N2()
536 s->N2_tx = s->N2_bytes; in calculate_N2()
539 if (GETFIELD(SPI_CTR_CFG_N2_CTRL_B3, s->regs[SPI_CTR_CFG_REG]) == 1) { in calculate_N2()
540 s->N2_rx = s->N2_bytes; in calculate_N2()
543 /* Implicit mode/Forced Implicit mode, use M field from opcode */ in calculate_N2()
544 s->N2_bytes = PNV_SPI_OPCODE_LO_NIBBLE(opcode); in calculate_N2()
545 s->N2_bits = s->N2_bytes * 8; in calculate_N2()
547 s->N2_rx = s->N2_bytes; in calculate_N2()
548 s->N2_tx = 0; in calculate_N2()
549 /* Let Forced Implicit mode have an effect on the counts */ in calculate_N2()
550 if (GETFIELD(SPI_CTR_CFG_N2_CTRL_B1, s->regs[SPI_CTR_CFG_REG]) == 1) { in calculate_N2()
552 * If Forced Implicit mode and count control doesn't in calculate_N2()
556 s->regs[SPI_CTR_CFG_REG]) == 0) { in calculate_N2()
557 s->N2_rx = 0; in calculate_N2()
561 s->regs[SPI_CTR_CFG_REG]) == 1) { in calculate_N2()
562 s->N2_tx = s->N2_bytes; in calculate_N2()
575 s->regs[SPI_CLK_CFG_REG]); in calculate_N2()
577 if (s->N2_bytes > (PNV_SPI_REG_SIZE + 1)) { in calculate_N2()
579 s->N2_bytes = PNV_SPI_REG_SIZE + 1; in calculate_N2()
580 s->N2_bits = s->N2_bytes * 8; in calculate_N2()
582 } else if (s->N2_bytes > PNV_SPI_REG_SIZE) { in calculate_N2()
584 s->N2_bytes = PNV_SPI_REG_SIZE; in calculate_N2()
585 s->N2_bits = s->N2_bytes * 8; in calculate_N2()
597 bool stop = false; in operation_shiftn2() local
611 trace_pnv_spi_log_Ncounts(s->N1_bits, s->N1_bytes, s->N1_tx, in operation_shiftn2()
612 s->N1_rx, s->N2_bits, s->N2_bytes, s->N2_tx, s->N2_rx); in operation_shiftn2()
626 while (n2_count < s->N2_bytes) { in operation_shiftn2()
630 * buffer since RDR full causes a sequence stop and restart. in operation_shiftn2()
632 if ((s->N2_rx != 0) && in operation_shiftn2()
633 (GETFIELD(SPI_STS_RDR_FULL, s->status) == 1)) { in operation_shiftn2()
636 stop = true; in operation_shiftn2()
639 if ((s->N2_tx != 0) && ((s->N1_tx + n2_count) < in operation_shiftn2()
643 n2_byte = get_from_offset(s, (s->N1_tx + n2_count)); in operation_shiftn2()
644 trace_pnv_spi_tx_append("n2_byte", n2_byte, (s->N1_tx + n2_count)); in operation_shiftn2()
645 *(pnv_spi_xfer_buffer_write_ptr(*payload, (*payload)->len, 1)) in operation_shiftn2()
654 *(pnv_spi_xfer_buffer_write_ptr(*payload, (*payload)->len, 1)) in operation_shiftn2()
659 if (!stop) { in operation_shiftn2()
661 trace_pnv_spi_tx_request("Shifting N2 frame", (*payload)->len); in operation_shiftn2()
668 if ((s->N2_tx != 0) && in operation_shiftn2()
669 (GETFIELD(SPI_STS_TDR_FULL, s->status) == 1)) { in operation_shiftn2()
670 s->status = SETFIELD(SPI_STS_TDR_FULL, s->status, 0); in operation_shiftn2()
677 s->N2_bits = 0; in operation_shiftn2()
678 s->N2_bytes = 0; in operation_shiftn2()
679 s->N2_tx = 0; in operation_shiftn2()
680 s->N2_rx = 0; in operation_shiftn2()
681 s->N1_bits = 0; in operation_shiftn2()
682 s->N1_bytes = 0; in operation_shiftn2()
683 s->N1_tx = 0; in operation_shiftn2()
684 s->N1_rx = 0; in operation_shiftn2()
688 return stop; in operation_shiftn2()
700 bool stop = false; /* Flag to stop the sequencer */ in operation_sequencer() local
706 * This is a static because there are cases where a sequence has to stop in operation_sequencer()
718 * Clear the sequencer FSM error bit - general_SPI_status[3] in operation_sequencer()
721 s->status = SETFIELD(SPI_STS_GEN_STATUS_B3, s->status, 0); in operation_sequencer()
726 if (GETFIELD(SPI_STS_SEQ_FSM, s->status) == SEQ_STATE_IDLE) { in operation_sequencer()
727 s->status = SETFIELD(SPI_STS_SEQ_INDEX, s->status, 0); in operation_sequencer()
734 opcode = s->seq_op[get_seq_index(s)]; in operation_sequencer()
736 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_DECODE); in operation_sequencer()
749 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
750 /* A stop operation in any position stops the sequencer */ in operation_sequencer()
751 trace_pnv_spi_sequencer_op("STOP", get_seq_index(s)); in operation_sequencer()
753 stop = true; in operation_sequencer()
754 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, FSM_IDLE); in operation_sequencer()
755 s->loop_counter_1 = 0; in operation_sequencer()
756 s->loop_counter_2 = 0; in operation_sequencer()
757 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_IDLE); in operation_sequencer()
761 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
765 * connection at position 0. De-selecting a responder is fine in operation_sequencer()
769 s->responder_select = PNV_SPI_OPCODE_LO_NIBBLE(opcode); in operation_sequencer()
770 if (s->responder_select == 0) { in operation_sequencer()
772 qemu_set_irq(s->cs_line[0], 1); in operation_sequencer()
773 s->status = SETFIELD(SPI_STS_SEQ_INDEX, s->status, in operation_sequencer()
775 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, FSM_DONE); in operation_sequencer()
776 } else if (s->responder_select != 1) { in operation_sequencer()
779 s->responder_select); in operation_sequencer()
782 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, FSM_IDLE); in operation_sequencer()
783 stop = true; in operation_sequencer()
789 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, FSM_START); in operation_sequencer()
791 qemu_set_irq(s->cs_line[0], 0); in operation_sequencer()
800 s->shift_n1_done = false; in operation_sequencer()
806 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
812 * - processed a responder deselect (DONE) in operation_sequencer()
813 * - processed a stop opcode (IDLE) in operation_sequencer()
814 * - encountered an error (IDLE) in operation_sequencer()
816 if ((GETFIELD(SPI_STS_SHIFTER_FSM, s->status) == FSM_IDLE) || in operation_sequencer()
817 (GETFIELD(SPI_STS_SHIFTER_FSM, s->status) == FSM_DONE)) { in operation_sequencer()
820 SPI_STS_SHIFTER_FSM, s->status)); in operation_sequencer()
825 s->status = SETFIELD(SPI_STS_GEN_STATUS_B3, s->status, 1); in operation_sequencer()
827 stop = true; in operation_sequencer()
839 if (PNV_SPI_MASKED_OPCODE(s->seq_op[get_seq_index(s) + 1]) in operation_sequencer()
843 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, in operation_sequencer()
845 stop = operation_shiftn1(s, opcode, &payload, send_n1_alone); in operation_sequencer()
846 if (stop) { in operation_sequencer()
848 * The operation code says to stop, this can occur if: in operation_sequencer()
858 if (GETFIELD(SPI_STS_TDR_UNDERRUN, s->status)) { in operation_sequencer()
859 s->shift_n1_done = true; in operation_sequencer()
860 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, in operation_sequencer()
862 s->status = SETFIELD(SPI_STS_SEQ_INDEX, s->status, in operation_sequencer()
869 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, in operation_sequencer()
874 s->shift_n1_done = true; in operation_sequencer()
881 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
883 if (!s->shift_n1_done) { in operation_sequencer()
886 GETFIELD(SPI_STS_SHIFTER_FSM, s->status)); in operation_sequencer()
892 s->status = SETFIELD(SPI_STS_GEN_STATUS_B3, s->status, 1); in operation_sequencer()
895 stop = true; in operation_sequencer()
898 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, in operation_sequencer()
900 stop = operation_shiftn2(s, opcode, &payload); in operation_sequencer()
902 * If the operation code says to stop set the shifter state to in operation_sequencer()
903 * wait and stop in operation_sequencer()
905 if (stop) { in operation_sequencer()
906 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, in operation_sequencer()
916 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
924 * completed and will stop the sequencer until RDR full is set to in operation_sequencer()
927 if (GETFIELD(SPI_STS_RDR_FULL, s->status) == 1) { in operation_sequencer()
940 s->status = SETFIELD(SPI_STS_SEQ_INDEX, s->status, in operation_sequencer()
948 s->status = SETFIELD(SPI_STS_RDR_FULL, s->status, 0); in operation_sequencer()
952 stop = true; in operation_sequencer()
953 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, FSM_WAIT); in operation_sequencer()
958 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
964 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
970 * no-op in operation_sequencer()
972 if (s->loop_counter_1 != in operation_sequencer()
973 GETFIELD(SPI_CTR_CFG_CMP1, s->regs[SPI_CTR_CFG_REG])) { in operation_sequencer()
979 s->status = SETFIELD(SPI_STS_SEQ_INDEX, s->status, in operation_sequencer()
981 s->loop_counter_1++; in operation_sequencer()
989 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
992 s->regs[SPI_CTR_CFG_REG]); in operation_sequencer()
997 * no-op in operation_sequencer()
999 if (s->loop_counter_2 != condition2) { in operation_sequencer()
1005 s->status = SETFIELD(SPI_STS_SEQ_INDEX, in operation_sequencer()
1006 s->status, PNV_SPI_OPCODE_LO_NIBBLE(opcode)); in operation_sequencer()
1007 s->loop_counter_2++; in operation_sequencer()
1015 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_EXECUTE); in operation_sequencer()
1021 * If we used all 8 opcodes without seeing a 00 - STOP in the sequence in operation_sequencer()
1022 * we need to go ahead and end things as if there was a STOP at the in operation_sequencer()
1027 s->status = SETFIELD(SPI_STS_SHIFTER_FSM, s->status, FSM_IDLE); in operation_sequencer()
1028 s->status = SETFIELD(SPI_STS_SEQ_INDEX, s->status, 0); in operation_sequencer()
1029 s->loop_counter_1 = 0; in operation_sequencer()
1030 s->loop_counter_2 = 0; in operation_sequencer()
1031 s->status = SETFIELD(SPI_STS_SEQ_FSM, s->status, SEQ_STATE_IDLE); in operation_sequencer()
1034 /* Break the loop if a stop was requested */ in operation_sequencer()
1035 if (stop) { in operation_sequencer()
1061 ssi_dev = ssi_get_cs(s->ssi_bus, 0); in do_reset()
1068 s->N2_bits = 0; in do_reset()
1069 s->N2_bytes = 0; in do_reset()
1070 s->N2_tx = 0; in do_reset()
1071 s->N2_rx = 0; in do_reset()
1072 s->N1_bits = 0; in do_reset()
1073 s->N1_bytes = 0; in do_reset()
1074 s->N1_tx = 0; in do_reset()
1075 s->N1_rx = 0; in do_reset()
1076 s->loop_counter_1 = 0; in do_reset()
1077 s->loop_counter_2 = 0; in do_reset()
1079 qemu_set_irq(s->cs_line[0], 1); in do_reset()
1095 val = s->regs[reg]; in pnv_spi_xscom_read()
1098 val = s->regs[reg]; in pnv_spi_xscom_read()
1100 s->status = SETFIELD(SPI_STS_RDR_FULL, s->status, 0); in pnv_spi_xscom_read()
1101 if (GETFIELD(SPI_STS_SHIFTER_FSM, s->status) == FSM_WAIT) { in pnv_spi_xscom_read()
1109 val = (val << 8) | s->seq_op[i]; in pnv_spi_xscom_read()
1113 val = s->status; in pnv_spi_xscom_read()
1138 s->regs[reg] = val; in pnv_spi_xscom_write()
1145 if ((GETFIELD(SPI_CLK_CFG_RST_CTRL, s->regs[SPI_CLK_CFG_REG]) == 0x5) in pnv_spi_xscom_write()
1148 s->regs[reg] = SPI_CLK_CFG_HARD_RST; in pnv_spi_xscom_write()
1150 s->regs[reg] = val; in pnv_spi_xscom_write()
1162 s->regs[reg] = val; in pnv_spi_xscom_write()
1164 s->status = SETFIELD(SPI_STS_TDR_FULL, s->status, 1); in pnv_spi_xscom_write()
1165 s->status = SETFIELD(SPI_STS_TDR_UNDERRUN, s->status, 0); in pnv_spi_xscom_write()
1171 s->seq_op[i] = (val >> (56 - i * 8)) & 0xFF; in pnv_spi_xscom_write()
1176 s->status = SETFIELD(SPI_STS_RDR_OVERRUN, s->status, in pnv_spi_xscom_write()
1178 s->status = SETFIELD(SPI_STS_TDR_OVERRUN, s->status, in pnv_spi_xscom_write()
1208 s->spic_num); in pnv_spi_realize()
1209 s->ssi_bus = ssi_create_bus(dev, name); in pnv_spi_realize()
1210 s->cs_line = g_new0(qemu_irq, 1); in pnv_spi_realize()
1211 qdev_init_gpio_out_named(DEVICE(s), s->cs_line, "cs", 1); in pnv_spi_realize()
1214 pnv_xscom_region_init(&s->xscom_spic_regs, OBJECT(s), &pnv_spi_xscom_ops, in pnv_spi_realize()
1215 s, "xscom-spi", PNV10_XSCOM_PIB_SPIC_SIZE); in pnv_spi_realize()
1224 const char compat[] = "ibm,power10-spi"; in pnv_spi_dt_xscom()
1226 s->spic_num * PNV10_XSCOM_PIB_SPIC_SIZE; in pnv_spi_dt_xscom()
1237 _FDT((fdt_setprop_cell(fdt, s_offset, "spic_num#", s->spic_num))); in pnv_spi_dt_xscom()
1246 xscomc->dt_xscom = pnv_spi_dt_xscom; in pnv_spi_class_init()
1248 dc->desc = "PowerNV SPI"; in pnv_spi_class_init()
1249 dc->realize = pnv_spi_realize; in pnv_spi_class_init()