112     uint32_t data = s->regs[IBEX_SPI_HOST_STATUS];  in ibex_spi_rxfifo_reset()
117     s->regs[IBEX_SPI_HOST_STATUS] = data;  in ibex_spi_rxfifo_reset()
122     uint32_t data = s->regs[IBEX_SPI_HOST_STATUS];  in ibex_spi_txfifo_reset()
127     s->regs[IBEX_SPI_HOST_STATUS] = data;  in ibex_spi_txfifo_reset()
141     s->regs[IBEX_SPI_HOST_STATUS]       = 0x00;  in ibex_spi_host_reset()
177     uint32_t status_reg = s->regs[IBEX_SPI_HOST_STATUS];  in ibex_spi_host_irq()
248             s->regs[IBEX_SPI_HOST_STATUS] |= R_STATUS_TXSTALL_MASK;  in ibex_spi_host_transfer()
252             s->regs[IBEX_SPI_HOST_STATUS] |= R_STATUS_RXSTALL_MASK;  in ibex_spi_host_transfer()
266             s->regs[IBEX_SPI_HOST_STATUS] |= R_STATUS_RXFULL_MASK;  in ibex_spi_host_transfer()
271     data = s->regs[IBEX_SPI_HOST_STATUS];  in ibex_spi_host_transfer()
283     s->regs[IBEX_SPI_HOST_STATUS] = data;  in ibex_spi_host_transfer()
304     case IBEX_SPI_HOST_CONTROL...IBEX_SPI_HOST_STATUS:  in ibex_spi_host_read()
318         s->regs[IBEX_SPI_HOST_STATUS] &= ~R_STATUS_RXFULL_MASK;  in ibex_spi_host_read()
323                 s->regs[IBEX_SPI_HOST_STATUS] |= R_STATUS_RXEMPTY_MASK;  in ibex_spi_host_read()
386             s->regs[IBEX_SPI_HOST_STATUS] &=  ~R_STATUS_ACTIVE_MASK;  in ibex_spi_host_write()
421         if (!(FIELD_EX32(s->regs[IBEX_SPI_HOST_STATUS],  in ibex_spi_host_write()
429         s->regs[IBEX_SPI_HOST_STATUS] &= ~R_STATUS_READY_MASK;  in ibex_spi_host_write()
465                 s->regs[IBEX_SPI_HOST_STATUS] |= R_STATUS_TXFULL_MASK;  in ibex_spi_host_write()
472             status = s->regs[IBEX_SPI_HOST_STATUS];  in ibex_spi_host_write()
484         status = s->regs[IBEX_SPI_HOST_STATUS];  in ibex_spi_host_write()
495         s->regs[IBEX_SPI_HOST_STATUS] = status;  in ibex_spi_host_write()