Lines Matching +full:0 +full:x05000000
74 #define KERNEL_LOAD_ADDR 0x00004000
75 #define CMDLINE_ADDR 0x007ff000
76 #define INITRD_LOAD_ADDR 0x00800000
78 #define PROM_VADDR 0xffd00000
80 #define CFG_ADDR 0xd00000510ULL
81 #define FW_CFG_SUN4M_DEPTH (FW_CFG_ARCH_LOCAL + 0x00)
82 #define FW_CFG_SUN4M_WIDTH (FW_CFG_ARCH_LOCAL + 0x01)
83 #define FW_CFG_SUN4M_HEIGHT (FW_CFG_ARCH_LOCAL + 0x02)
131 for (size_t i = 0; i < ARRAY_SIZE(fw_cfg_arch_wellknown_keys); i++) { in DECLARE_CLASS_CHECKERS()
142 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); in fw_cfg_boot_set()
153 uint8_t image[0x1ff0]; in nvram_init()
156 memset(image, '\0', sizeof(image)); in nvram_init()
159 sysp_end = chrp_nvram_create_system_partition(image, 0, 0x1fd0); in nvram_init()
162 chrp_nvram_create_free_partition(&image[sysp_end], 0x1fd0 - sysp_end); in nvram_init()
164 Sun_init_header((struct Sun_nvram *)&image[0x1fd8], macaddr, in nvram_init()
167 for (i = 0; i < sizeof(image); i++) { in nvram_init()
177 cs->halted = 0; in cpu_kick_irq()
219 return addr - 0xf0000000ULL; in translate_kernel_address()
234 kernel_size = 0; in sun4m_load_kernel()
241 bswap_needed = 0; in sun4m_load_kernel()
245 NULL, NULL, NULL, NULL, 1, EM_SPARC, 0, 0); in sun4m_load_kernel()
246 if (kernel_size < 0) in sun4m_load_kernel()
250 if (kernel_size < 0) in sun4m_load_kernel()
254 if (kernel_size < 0) { in sun4m_load_kernel()
260 *initrd_size = 0; in sun4m_load_kernel()
265 if ((int)*initrd_size < 0) { in sun4m_load_kernel()
271 if (*initrd_size > 0) { in sun4m_load_kernel()
272 for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { in sun4m_load_kernel()
274 if (ptr && ldl_p(ptr) == 0x48647253) { /* HdrS */ in sun4m_load_kernel()
294 sysbus_connect_irq(s, 0, irq); in iommu_init()
295 sysbus_mmio_map(s, 0, addr); in iommu_init()
334 sysbus_connect_irq(SYS_BUS_DEVICE(espdma), 0, espdma_irq); in sparc32_dma_init()
336 sysbus_connect_irq(SYS_BUS_DEVICE(ledma), 0, ledma_irq); in sparc32_dma_init()
338 sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base); in sparc32_dma_init()
340 sysbus_mmio_map(SYS_BUS_DEVICE(esp), 0, esp_base); in sparc32_dma_init()
343 sysbus_mmio_map(SYS_BUS_DEVICE(lance), 0, le_base); in sparc32_dma_init()
361 for (i = 0; i < MAX_CPUS; i++) { in slavio_intctl_init()
362 for (j = 0; j < MAX_PILS; j++) { in slavio_intctl_init()
366 sysbus_mmio_map(s, 0, addrg); in slavio_intctl_init()
367 for (i = 0; i < MAX_CPUS; i++) { in slavio_intctl_init()
374 #define SYS_TIMER_OFFSET 0x10000ULL
375 #define CPU_TIMER_OFFSET(cpu) (0x1000ULL * cpu)
388 sysbus_connect_irq(s, 0, master_irq); in slavio_timer_init_all()
389 sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET); in slavio_timer_init_all()
391 for (i = 0; i < MAX_CPUS; i++) { in slavio_timer_init_all()
408 #define MISC_LEDS 0x01600000
409 #define MISC_CFG 0x01800000
410 #define MISC_DIAG 0x01a00000
411 #define MISC_MDM 0x01b00000
412 #define MISC_SYS 0x01f00000
428 sysbus_mmio_map(s, 0, base + MISC_CFG); in slavio_misc_init()
448 sysbus_connect_irq(s, 0, irq); in slavio_misc_init()
450 slavio_system_powerdown = qdev_get_gpio_in(dev, 0); in slavio_misc_init()
463 sysbus_connect_irq(s, 0, irq); in ecc_init()
464 sysbus_mmio_map(s, 0, base); in ecc_init()
465 if (version == 0) { // SS-600MP only in ecc_init()
466 sysbus_mmio_map(s, 1, base + 0x1000); in ecc_init()
479 sysbus_mmio_map(s, 0, power_base); in apc_init()
480 sysbus_connect_irq(s, 0, cpu_halt); in apc_init()
498 sysbus_mmio_map(s, 0, addr); in tcx_init()
500 sysbus_mmio_map(s, 1, addr + 0x04000000ULL); in tcx_init()
502 sysbus_mmio_map(s, 2, addr + 0x06000000ULL); in tcx_init()
504 sysbus_mmio_map(s, 3, addr + 0x0c000000ULL); in tcx_init()
506 sysbus_mmio_map(s, 4, addr + 0x0e000000ULL); in tcx_init()
508 sysbus_mmio_map(s, 5, addr + 0x00700000ULL); in tcx_init()
510 sysbus_mmio_map(s, 6, addr + 0x00200000ULL); in tcx_init()
513 sysbus_mmio_map(s, 7, addr + 0x00300000ULL); in tcx_init()
515 sysbus_mmio_map(s, 7, addr + 0x00301000ULL); in tcx_init()
518 sysbus_mmio_map(s, 8, addr + 0x00240000ULL); in tcx_init()
520 sysbus_mmio_map(s, 9, addr + 0x00280000ULL); in tcx_init()
521 /* 0/DFB8 : 8-bit plane */ in tcx_init()
522 sysbus_mmio_map(s, 10, addr + 0x00800000ULL); in tcx_init()
524 sysbus_mmio_map(s, 11, addr + 0x02000000ULL); in tcx_init()
526 sysbus_mmio_map(s, 12, addr + 0x0a000000ULL); in tcx_init()
529 sysbus_mmio_map(s, 13, addr + 0x00301000ULL); in tcx_init()
532 sysbus_connect_irq(s, 0, irq); in tcx_init()
550 sysbus_mmio_map(s, 0, addr); in cg3_init()
552 sysbus_mmio_map(s, 1, addr + 0x400000ULL); in cg3_init()
554 sysbus_mmio_map(s, 2, addr + 0x800000ULL); in cg3_init()
556 sysbus_connect_irq(s, 0, irq); in cg3_init()
563 static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 };
574 sysbus_mmio_map(s, 0, addr); in idreg_init()
636 sysbus_mmio_map(s, 0, addr); in afx_init()
696 sysbus_mmio_map(s, 0, addr); in prom_init()
706 NULL, NULL, NULL, 1, EM_SPARC, 0, 0); in prom_init()
707 if (ret < 0 || ret > PROM_SIZE_MAX) { in prom_init()
714 if (ret < 0 || ret > PROM_SIZE_MAX) { in prom_init()
809 object_property_set_bool(OBJECT(cpu), "start-powered-off", id != 0, in cpu_devinit()
848 for(i = 0; i < smp_cpus; i++) { in sun4m_hw_init()
859 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0); in sun4m_hw_init()
870 hwdef->intctl_base + 0x10000ULL, in sun4m_hw_init()
873 for (i = 0; i < 32; i++) { in sun4m_hw_init()
876 for (i = 0; i < MAX_CPUS; i++) { in sun4m_hw_init()
922 cg3_init(hwdef->tcx_base, slavio_irq[11], 0x00100000, in sun4m_hw_init()
938 tcx_init(hwdef->tcx_base, slavio_irq[11], 0x00100000, in sun4m_hw_init()
944 for (i = 0; i < MAX_VSIMMS; i++) { in sun4m_hw_init()
948 empty_slot_init(name, hwdef->vsimm[i].reg_base, 0x2000); in sun4m_hw_init()
954 create_unimplemented_device("sun-sx", hwdef->sx_base, 0x2000); in sun4m_hw_init()
961 sysbus_connect_irq(s, 0, slavio_irq[0]); in sun4m_hw_init()
962 sysbus_mmio_map(s, 0, hwdef->nvram_base); in sun4m_hw_init()
968 Slavio TTYB (base+0, Linux ttyS1) is the second QEMU serial device */ in sun4m_hw_init()
979 sysbus_mmio_map(s, 0, hwdef->ms_kb_base); in sun4m_hw_init()
985 sysbus_connect_irq(s, 0, qdev_get_gpio_in(ms_kb_orgate, 0)); in sun4m_hw_init()
987 qdev_connect_gpio_out(ms_kb_orgate, 0, slavio_irq[14]); in sun4m_hw_init()
990 qdev_prop_set_uint32(dev, "disabled", 0); in sun4m_hw_init()
994 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); in sun4m_hw_init()
1000 sysbus_mmio_map(s, 0, hwdef->serial_base); in sun4m_hw_init()
1007 sysbus_connect_irq(s, 0, qdev_get_gpio_in(serial_orgate, 0)); in sun4m_hw_init()
1009 qdev_connect_gpio_out(serial_orgate, 0, slavio_irq[15]); in sun4m_hw_init()
1012 apc_init(hwdef->apc_base, qemu_allocate_irq(cpu_halt_signal, NULL, 0)); in sun4m_hw_init()
1017 memset(fd, 0, sizeof(fd)); in sun4m_hw_init()
1018 fd[0] = drive_get(IF_FLOPPY, 0, 0); in sun4m_hw_init()
1022 fdc_tc = qemu_allocate_irq(dummy_fdc_tc, NULL, 0); in sun4m_hw_init()
1037 hwdef->dbri_base + 0x1000, 0x30); in sun4m_hw_init()
1040 hwdef->dbri_base + 0x10000, 0x100); in sun4m_hw_init()
1045 create_unimplemented_device("sun-bpp", hwdef->bpp_base, 0x20); in sun4m_hw_init()
1048 initrd_size = 0; in sun4m_hw_init()
1070 sysbus_mmio_map(s, 0, CFG_ADDR); in sun4m_hw_init()
1090 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); in sun4m_hw_init()
1091 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0); in sun4m_hw_init()
1095 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_config.order[0]); in sun4m_hw_init()
1127 .iommu_base = 0x10000000, in ss5_class_init()
1128 .iommu_pad_base = 0x10004000, in ss5_class_init()
1129 .iommu_pad_len = 0x0fffb000, in ss5_class_init()
1130 .tcx_base = 0x50000000, in ss5_class_init()
1131 .cs_base = 0x6c000000, in ss5_class_init()
1132 .slavio_base = 0x70000000, in ss5_class_init()
1133 .ms_kb_base = 0x71000000, in ss5_class_init()
1134 .serial_base = 0x71100000, in ss5_class_init()
1135 .nvram_base = 0x71200000, in ss5_class_init()
1136 .fd_base = 0x71400000, in ss5_class_init()
1137 .counter_base = 0x71d00000, in ss5_class_init()
1138 .intctl_base = 0x71e00000, in ss5_class_init()
1139 .idreg_base = 0x78000000, in ss5_class_init()
1140 .dma_base = 0x78400000, in ss5_class_init()
1141 .esp_base = 0x78800000, in ss5_class_init()
1142 .le_base = 0x78c00000, in ss5_class_init()
1143 .apc_base = 0x6a000000, in ss5_class_init()
1144 .afx_base = 0x6e000000, in ss5_class_init()
1145 .aux1_base = 0x71900000, in ss5_class_init()
1146 .aux2_base = 0x71910000, in ss5_class_init()
1147 .nvram_machine_id = 0x80, in ss5_class_init()
1149 .iommu_version = 0x05000000, in ss5_class_init()
1150 .max_mem = 0x10000000, in ss5_class_init()
1164 .iommu_base = 0xfe0000000ULL, in ss10_class_init()
1165 .tcx_base = 0xe20000000ULL, in ss10_class_init()
1166 .slavio_base = 0xff0000000ULL, in ss10_class_init()
1167 .ms_kb_base = 0xff1000000ULL, in ss10_class_init()
1168 .serial_base = 0xff1100000ULL, in ss10_class_init()
1169 .nvram_base = 0xff1200000ULL, in ss10_class_init()
1170 .fd_base = 0xff1700000ULL, in ss10_class_init()
1171 .counter_base = 0xff1300000ULL, in ss10_class_init()
1172 .intctl_base = 0xff1400000ULL, in ss10_class_init()
1173 .idreg_base = 0xef0000000ULL, in ss10_class_init()
1174 .dma_base = 0xef0400000ULL, in ss10_class_init()
1175 .esp_base = 0xef0800000ULL, in ss10_class_init()
1176 .le_base = 0xef0c00000ULL, in ss10_class_init()
1177 .apc_base = 0xefa000000ULL, /* XXX should not exist */ in ss10_class_init()
1178 .aux1_base = 0xff1800000ULL, in ss10_class_init()
1179 .aux2_base = 0xff1a01000ULL, in ss10_class_init()
1180 .ecc_base = 0xf00000000ULL, in ss10_class_init()
1181 .ecc_version = 0x10000000, /* version 0, implementation 1 */ in ss10_class_init()
1182 .nvram_machine_id = 0x72, in ss10_class_init()
1184 .iommu_version = 0x03000000, in ss10_class_init()
1185 .max_mem = 0xf00000000ULL, in ss10_class_init()
1199 .iommu_base = 0xfe0000000ULL, in ss600mp_class_init()
1200 .tcx_base = 0xe20000000ULL, in ss600mp_class_init()
1201 .slavio_base = 0xff0000000ULL, in ss600mp_class_init()
1202 .ms_kb_base = 0xff1000000ULL, in ss600mp_class_init()
1203 .serial_base = 0xff1100000ULL, in ss600mp_class_init()
1204 .nvram_base = 0xff1200000ULL, in ss600mp_class_init()
1205 .counter_base = 0xff1300000ULL, in ss600mp_class_init()
1206 .intctl_base = 0xff1400000ULL, in ss600mp_class_init()
1207 .dma_base = 0xef0081000ULL, in ss600mp_class_init()
1208 .esp_base = 0xef0080000ULL, in ss600mp_class_init()
1209 .le_base = 0xef0060000ULL, in ss600mp_class_init()
1210 .apc_base = 0xefa000000ULL, /* XXX should not exist */ in ss600mp_class_init()
1211 .aux1_base = 0xff1800000ULL, in ss600mp_class_init()
1212 .aux2_base = 0xff1a01000ULL, /* XXX should not exist */ in ss600mp_class_init()
1213 .ecc_base = 0xf00000000ULL, in ss600mp_class_init()
1214 .ecc_version = 0x00000000, /* version 0, implementation 0 */ in ss600mp_class_init()
1215 .nvram_machine_id = 0x71, in ss600mp_class_init()
1217 .iommu_version = 0x01000000, in ss600mp_class_init()
1218 .max_mem = 0xf00000000ULL, in ss600mp_class_init()
1232 .iommu_base = 0xfe0000000ULL, in ss20_class_init()
1233 .tcx_base = 0xe20000000ULL, in ss20_class_init()
1234 .slavio_base = 0xff0000000ULL, in ss20_class_init()
1235 .ms_kb_base = 0xff1000000ULL, in ss20_class_init()
1236 .serial_base = 0xff1100000ULL, in ss20_class_init()
1237 .nvram_base = 0xff1200000ULL, in ss20_class_init()
1238 .fd_base = 0xff1700000ULL, in ss20_class_init()
1239 .counter_base = 0xff1300000ULL, in ss20_class_init()
1240 .intctl_base = 0xff1400000ULL, in ss20_class_init()
1241 .idreg_base = 0xef0000000ULL, in ss20_class_init()
1242 .dma_base = 0xef0400000ULL, in ss20_class_init()
1243 .esp_base = 0xef0800000ULL, in ss20_class_init()
1244 .le_base = 0xef0c00000ULL, in ss20_class_init()
1245 .bpp_base = 0xef4800000ULL, in ss20_class_init()
1246 .apc_base = 0xefa000000ULL, /* XXX should not exist */ in ss20_class_init()
1247 .aux1_base = 0xff1800000ULL, in ss20_class_init()
1248 .aux2_base = 0xff1a01000ULL, in ss20_class_init()
1249 .dbri_base = 0xee0000000ULL, in ss20_class_init()
1250 .sx_base = 0xf80000000ULL, in ss20_class_init()
1253 .reg_base = 0x9c000000ULL, in ss20_class_init()
1254 .vram_base = 0xfc000000ULL in ss20_class_init()
1256 .reg_base = 0x90000000ULL, in ss20_class_init()
1257 .vram_base = 0xf0000000ULL in ss20_class_init()
1259 .reg_base = 0x94000000ULL in ss20_class_init()
1261 .reg_base = 0x98000000ULL in ss20_class_init()
1264 .ecc_base = 0xf00000000ULL, in ss20_class_init()
1265 .ecc_version = 0x20000000, /* version 0, implementation 2 */ in ss20_class_init()
1266 .nvram_machine_id = 0x72, in ss20_class_init()
1268 .iommu_version = 0x13000000, in ss20_class_init()
1269 .max_mem = 0xf00000000ULL, in ss20_class_init()
1283 .iommu_base = 0x10000000, in voyager_class_init()
1284 .tcx_base = 0x50000000, in voyager_class_init()
1285 .slavio_base = 0x70000000, in voyager_class_init()
1286 .ms_kb_base = 0x71000000, in voyager_class_init()
1287 .serial_base = 0x71100000, in voyager_class_init()
1288 .nvram_base = 0x71200000, in voyager_class_init()
1289 .fd_base = 0x71400000, in voyager_class_init()
1290 .counter_base = 0x71d00000, in voyager_class_init()
1291 .intctl_base = 0x71e00000, in voyager_class_init()
1292 .idreg_base = 0x78000000, in voyager_class_init()
1293 .dma_base = 0x78400000, in voyager_class_init()
1294 .esp_base = 0x78800000, in voyager_class_init()
1295 .le_base = 0x78c00000, in voyager_class_init()
1296 .apc_base = 0x71300000, /* pmc */ in voyager_class_init()
1297 .aux1_base = 0x71900000, in voyager_class_init()
1298 .aux2_base = 0x71910000, in voyager_class_init()
1299 .nvram_machine_id = 0x80, in voyager_class_init()
1301 .iommu_version = 0x05000000, in voyager_class_init()
1302 .max_mem = 0x10000000, in voyager_class_init()
1315 .iommu_base = 0x10000000, in ss_lx_class_init()
1316 .iommu_pad_base = 0x10004000, in ss_lx_class_init()
1317 .iommu_pad_len = 0x0fffb000, in ss_lx_class_init()
1318 .tcx_base = 0x50000000, in ss_lx_class_init()
1319 .slavio_base = 0x70000000, in ss_lx_class_init()
1320 .ms_kb_base = 0x71000000, in ss_lx_class_init()
1321 .serial_base = 0x71100000, in ss_lx_class_init()
1322 .nvram_base = 0x71200000, in ss_lx_class_init()
1323 .fd_base = 0x71400000, in ss_lx_class_init()
1324 .counter_base = 0x71d00000, in ss_lx_class_init()
1325 .intctl_base = 0x71e00000, in ss_lx_class_init()
1326 .idreg_base = 0x78000000, in ss_lx_class_init()
1327 .dma_base = 0x78400000, in ss_lx_class_init()
1328 .esp_base = 0x78800000, in ss_lx_class_init()
1329 .le_base = 0x78c00000, in ss_lx_class_init()
1330 .aux1_base = 0x71900000, in ss_lx_class_init()
1331 .aux2_base = 0x71910000, in ss_lx_class_init()
1332 .nvram_machine_id = 0x80, in ss_lx_class_init()
1334 .iommu_version = 0x04000000, in ss_lx_class_init()
1335 .max_mem = 0x10000000, in ss_lx_class_init()
1348 .iommu_base = 0x10000000, in ss4_class_init()
1349 .tcx_base = 0x50000000, in ss4_class_init()
1350 .cs_base = 0x6c000000, in ss4_class_init()
1351 .slavio_base = 0x70000000, in ss4_class_init()
1352 .ms_kb_base = 0x71000000, in ss4_class_init()
1353 .serial_base = 0x71100000, in ss4_class_init()
1354 .nvram_base = 0x71200000, in ss4_class_init()
1355 .fd_base = 0x71400000, in ss4_class_init()
1356 .counter_base = 0x71d00000, in ss4_class_init()
1357 .intctl_base = 0x71e00000, in ss4_class_init()
1358 .idreg_base = 0x78000000, in ss4_class_init()
1359 .dma_base = 0x78400000, in ss4_class_init()
1360 .esp_base = 0x78800000, in ss4_class_init()
1361 .le_base = 0x78c00000, in ss4_class_init()
1362 .apc_base = 0x6a000000, in ss4_class_init()
1363 .aux1_base = 0x71900000, in ss4_class_init()
1364 .aux2_base = 0x71910000, in ss4_class_init()
1365 .nvram_machine_id = 0x80, in ss4_class_init()
1367 .iommu_version = 0x05000000, in ss4_class_init()
1368 .max_mem = 0x10000000, in ss4_class_init()
1381 .iommu_base = 0x10000000, in scls_class_init()
1382 .tcx_base = 0x50000000, in scls_class_init()
1383 .slavio_base = 0x70000000, in scls_class_init()
1384 .ms_kb_base = 0x71000000, in scls_class_init()
1385 .serial_base = 0x71100000, in scls_class_init()
1386 .nvram_base = 0x71200000, in scls_class_init()
1387 .fd_base = 0x71400000, in scls_class_init()
1388 .counter_base = 0x71d00000, in scls_class_init()
1389 .intctl_base = 0x71e00000, in scls_class_init()
1390 .idreg_base = 0x78000000, in scls_class_init()
1391 .dma_base = 0x78400000, in scls_class_init()
1392 .esp_base = 0x78800000, in scls_class_init()
1393 .le_base = 0x78c00000, in scls_class_init()
1394 .apc_base = 0x6a000000, in scls_class_init()
1395 .aux1_base = 0x71900000, in scls_class_init()
1396 .aux2_base = 0x71910000, in scls_class_init()
1397 .nvram_machine_id = 0x80, in scls_class_init()
1399 .iommu_version = 0x05000000, in scls_class_init()
1400 .max_mem = 0x10000000, in scls_class_init()
1413 .iommu_base = 0x10000000, in sbook_class_init()
1414 .tcx_base = 0x50000000, /* XXX */ in sbook_class_init()
1415 .slavio_base = 0x70000000, in sbook_class_init()
1416 .ms_kb_base = 0x71000000, in sbook_class_init()
1417 .serial_base = 0x71100000, in sbook_class_init()
1418 .nvram_base = 0x71200000, in sbook_class_init()
1419 .fd_base = 0x71400000, in sbook_class_init()
1420 .counter_base = 0x71d00000, in sbook_class_init()
1421 .intctl_base = 0x71e00000, in sbook_class_init()
1422 .idreg_base = 0x78000000, in sbook_class_init()
1423 .dma_base = 0x78400000, in sbook_class_init()
1424 .esp_base = 0x78800000, in sbook_class_init()
1425 .le_base = 0x78c00000, in sbook_class_init()
1426 .apc_base = 0x6a000000, in sbook_class_init()
1427 .aux1_base = 0x71900000, in sbook_class_init()
1428 .aux2_base = 0x71910000, in sbook_class_init()
1429 .nvram_machine_id = 0x80, in sbook_class_init()
1431 .iommu_version = 0x05000000, in sbook_class_init()
1432 .max_mem = 0x10000000, in sbook_class_init()