Lines Matching refs:SDHC_HOSTCTL2

195 #define SDHC_HOSTCTL2                  0x3E  macro
196 FIELD(SDHC_HOSTCTL2, UHS_MODE_SEL,     0, 3);
197 FIELD(SDHC_HOSTCTL2, V18_ENA,          3, 1); /* UHS-I only */
198 FIELD(SDHC_HOSTCTL2, DRIVER_STRENGTH,  4, 2); /* UHS-I only */
199 FIELD(SDHC_HOSTCTL2, EXECUTE_TUNING,   6, 1); /* UHS-I only */
200 FIELD(SDHC_HOSTCTL2, SAMPLING_CLKSEL,  7, 1); /* UHS-I only */
201 FIELD(SDHC_HOSTCTL2, UHS_II_ENA,       8, 1); /* since v4 */
202 FIELD(SDHC_HOSTCTL2, ADMA2_LENGTH,    10, 1); /* since v4 */
203 FIELD(SDHC_HOSTCTL2, CMD23_ENA,       11, 1); /* since v4 */
204 FIELD(SDHC_HOSTCTL2, VERSION4,        12, 1); /* since v4 */
205 FIELD(SDHC_HOSTCTL2, ASYNC_INT,       14, 1);
206 FIELD(SDHC_HOSTCTL2, PRESET_ENA,      15, 1);