Lines Matching +full:ecam +full:- +full:based
2 * QEMU RISC-V VirtIO Board
6 * RISC-V machine with 16550a UART and VirtIO MMIO
23 #include "qemu/error-report.h"
24 #include "qemu/guest-random.h"
29 #include "hw/qdev-properties.h"
30 #include "hw/char/serial-mm.h"
32 #include "hw/core/sysbus-fdt.h"
45 #include "hw/platform-bus.h"
54 #include "hw/pci-host/gpex.h"
56 #include "hw/acpi/aml-build.h"
57 #include "qapi/qapi-visit-common.h"
58 #include "hw/virtio/virtio-iommu.h"
63 return kvm_irqchip_in_kernel() && s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC; in virt_use_kvm_aia()
115 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); in virt_flash_create1()
117 qdev_prop_set_uint8(dev, "device-width", 2); in virt_flash_create1()
118 qdev_prop_set_bit(dev, "big-endian", false); in virt_flash_create1()
134 s->flash[0] = virt_flash_create1(s, "virt.flash0", "pflash0"); in virt_flash_create()
135 s->flash[1] = virt_flash_create1(s, "virt.flash1", "pflash1"); in virt_flash_create()
146 qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); in virt_flash_map1()
160 virt_flash_map1(s->flash[0], flashbase, flashsize, in virt_flash_map()
162 virt_flash_map1(s->flash[1], flashbase + flashsize, flashsize, in virt_flash_map()
176 * each device's first interrupt is based on it's PCI_SLOT number. in create_pcie_irq_map()
180 * possible slot) seeing the interrupt-map-mask will allow the table in create_pcie_irq_map()
201 if (s->aia_type != VIRT_AIA_TYPE_NONE) { in create_pcie_irq_map()
212 qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map, in create_pcie_irq_map()
216 qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask", in create_pcie_irq_map()
227 bool is_32_bit = riscv_is_32bit(&s->soc[0]); in create_fdt_socket_cpus()
230 for (cpu = s->soc[socket].num_harts - 1; cpu >= 0; cpu--) { in create_fdt_socket_cpus()
231 RISCVCPU *cpu_ptr = &s->soc[socket].harts[cpu]; in create_fdt_socket_cpus()
240 s->soc[socket].hartid_base + cpu); in create_fdt_socket_cpus()
241 qemu_fdt_add_subnode(ms->fdt, cpu_name); in create_fdt_socket_cpus()
243 if (cpu_ptr->cfg.satp_mode.supported != 0) { in create_fdt_socket_cpus()
244 satp_mode_max = satp_mode_max_from_map(cpu_ptr->cfg.satp_mode.map); in create_fdt_socket_cpus()
247 qemu_fdt_setprop_string(ms->fdt, cpu_name, "mmu-type", sv_name); in create_fdt_socket_cpus()
250 riscv_isa_write_fdt(cpu_ptr, ms->fdt, cpu_name); in create_fdt_socket_cpus()
252 if (cpu_ptr->cfg.ext_zicbom) { in create_fdt_socket_cpus()
253 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbom-block-size", in create_fdt_socket_cpus()
254 cpu_ptr->cfg.cbom_blocksize); in create_fdt_socket_cpus()
257 if (cpu_ptr->cfg.ext_zicboz) { in create_fdt_socket_cpus()
258 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cboz-block-size", in create_fdt_socket_cpus()
259 cpu_ptr->cfg.cboz_blocksize); in create_fdt_socket_cpus()
262 if (cpu_ptr->cfg.ext_zicbop) { in create_fdt_socket_cpus()
263 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbop-block-size", in create_fdt_socket_cpus()
264 cpu_ptr->cfg.cbop_blocksize); in create_fdt_socket_cpus()
267 qemu_fdt_setprop_string(ms->fdt, cpu_name, "compatible", "riscv"); in create_fdt_socket_cpus()
268 qemu_fdt_setprop_string(ms->fdt, cpu_name, "status", "okay"); in create_fdt_socket_cpus()
269 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "reg", in create_fdt_socket_cpus()
270 s->soc[socket].hartid_base + cpu); in create_fdt_socket_cpus()
271 qemu_fdt_setprop_string(ms->fdt, cpu_name, "device_type", "cpu"); in create_fdt_socket_cpus()
273 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "phandle", cpu_phandle); in create_fdt_socket_cpus()
277 intc_name = g_strdup_printf("%s/interrupt-controller", cpu_name); in create_fdt_socket_cpus()
278 qemu_fdt_add_subnode(ms->fdt, intc_name); in create_fdt_socket_cpus()
279 qemu_fdt_setprop_cell(ms->fdt, intc_name, "phandle", in create_fdt_socket_cpus()
281 qemu_fdt_setprop_string(ms->fdt, intc_name, "compatible", in create_fdt_socket_cpus()
282 "riscv,cpu-intc"); in create_fdt_socket_cpus()
283 qemu_fdt_setprop(ms->fdt, intc_name, "interrupt-controller", NULL, 0); in create_fdt_socket_cpus()
284 qemu_fdt_setprop_cell(ms->fdt, intc_name, "#interrupt-cells", 1); in create_fdt_socket_cpus()
287 qemu_fdt_add_subnode(ms->fdt, core_name); in create_fdt_socket_cpus()
288 qemu_fdt_setprop_cell(ms->fdt, core_name, "cpu", cpu_phandle); in create_fdt_socket_cpus()
302 qemu_fdt_add_subnode(ms->fdt, mem_name); in create_fdt_socket_memory()
303 qemu_fdt_setprop_cells(ms->fdt, mem_name, "reg", in create_fdt_socket_memory()
305 qemu_fdt_setprop_string(ms->fdt, mem_name, "device_type", "memory"); in create_fdt_socket_memory()
322 clint_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); in create_fdt_socket_clint()
324 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_clint()
333 qemu_fdt_add_subnode(ms->fdt, clint_name); in create_fdt_socket_clint()
334 qemu_fdt_setprop_string_array(ms->fdt, clint_name, "compatible", in create_fdt_socket_clint()
337 qemu_fdt_setprop_cells(ms->fdt, clint_name, "reg", in create_fdt_socket_clint()
339 qemu_fdt_setprop(ms->fdt, clint_name, "interrupts-extended", in create_fdt_socket_clint()
340 clint_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); in create_fdt_socket_clint()
357 aclint_mswi_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
358 aclint_mtimer_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
359 aclint_sswi_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
361 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_aclint()
369 aclint_cells_size = s->soc[socket].num_harts * sizeof(uint32_t) * 2; in create_fdt_socket_aclint()
371 if (s->aia_type != VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
374 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
375 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
376 "riscv,aclint-mswi"); in create_fdt_socket_aclint()
377 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
379 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
381 qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0); in create_fdt_socket_aclint()
382 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", 0); in create_fdt_socket_aclint()
387 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
394 size = memmap[VIRT_CLINT].size - RISCV_ACLINT_SWI_SIZE; in create_fdt_socket_aclint()
397 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
398 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
399 "riscv,aclint-mtimer"); in create_fdt_socket_aclint()
400 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
402 0x0, size - RISCV_ACLINT_DEFAULT_MTIME, in create_fdt_socket_aclint()
405 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
410 if (s->aia_type != VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
414 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
415 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
416 "riscv,aclint-sswi"); in create_fdt_socket_aclint()
417 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
419 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
421 qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0); in create_fdt_socket_aclint()
422 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", 0); in create_fdt_socket_aclint()
439 "sifive,plic-1.0.0", "riscv,plic0" in create_fdt_socket_plic()
445 qemu_fdt_add_subnode(ms->fdt, plic_name); in create_fdt_socket_plic()
446 qemu_fdt_setprop_cell(ms->fdt, plic_name, in create_fdt_socket_plic()
447 "#interrupt-cells", FDT_PLIC_INT_CELLS); in create_fdt_socket_plic()
448 qemu_fdt_setprop_cell(ms->fdt, plic_name, in create_fdt_socket_plic()
449 "#address-cells", FDT_PLIC_ADDR_CELLS); in create_fdt_socket_plic()
450 qemu_fdt_setprop_string_array(ms->fdt, plic_name, "compatible", in create_fdt_socket_plic()
453 qemu_fdt_setprop(ms->fdt, plic_name, "interrupt-controller", NULL, 0); in create_fdt_socket_plic()
456 plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_plic()
458 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_plic()
463 qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", in create_fdt_socket_plic()
465 s->soc[socket].num_harts * sizeof(uint32_t) * 2); in create_fdt_socket_plic()
467 plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); in create_fdt_socket_plic()
469 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_plic()
476 qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", in create_fdt_socket_plic()
478 s->soc[socket].num_harts * sizeof(uint32_t) * 4); in create_fdt_socket_plic()
481 qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg", in create_fdt_socket_plic()
483 qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev", in create_fdt_socket_plic()
484 VIRT_IRQCHIP_NUM_SOURCES - 1); in create_fdt_socket_plic()
486 qemu_fdt_setprop_cell(ms->fdt, plic_name, "phandle", in create_fdt_socket_plic()
490 platform_bus_add_all_fdt_nodes(ms->fdt, plic_name, in create_fdt_socket_plic()
523 imsic_cells = g_new0(uint32_t, ms->smp.cpus * 2); in create_fdt_one_imsic()
526 for (cpu = 0; cpu < ms->smp.cpus; cpu++) { in create_fdt_one_imsic()
535 s->soc[socket].num_harts; in create_fdt_one_imsic()
540 if (imsic_max_hart_per_socket < s->soc[socket].num_harts) { in create_fdt_one_imsic()
541 imsic_max_hart_per_socket = s->soc[socket].num_harts; in create_fdt_one_imsic()
545 imsic_name = g_strdup_printf("/soc/interrupt-controller@%lx", in create_fdt_one_imsic()
547 qemu_fdt_add_subnode(ms->fdt, imsic_name); in create_fdt_one_imsic()
548 qemu_fdt_setprop_string_array(ms->fdt, imsic_name, "compatible", in create_fdt_one_imsic()
552 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "#interrupt-cells", in create_fdt_one_imsic()
554 qemu_fdt_setprop(ms->fdt, imsic_name, "interrupt-controller", NULL, 0); in create_fdt_one_imsic()
555 qemu_fdt_setprop(ms->fdt, imsic_name, "msi-controller", NULL, 0); in create_fdt_one_imsic()
556 qemu_fdt_setprop(ms->fdt, imsic_name, "interrupts-extended", in create_fdt_one_imsic()
557 imsic_cells, ms->smp.cpus * sizeof(uint32_t) * 2); in create_fdt_one_imsic()
558 qemu_fdt_setprop(ms->fdt, imsic_name, "reg", imsic_regs, in create_fdt_one_imsic()
560 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,num-ids", in create_fdt_one_imsic()
564 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,guest-index-bits", in create_fdt_one_imsic()
569 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,hart-index-bits", in create_fdt_one_imsic()
571 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,group-index-bits", in create_fdt_one_imsic()
573 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,group-index-shift", in create_fdt_one_imsic()
576 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "phandle", msi_phandle); in create_fdt_one_imsic()
587 /* M-level IMSIC node */ in create_fdt_imsic()
592 /* S-level IMSIC node */ in create_fdt_imsic()
595 imsic_num_bits(s->aia_guests + 1)); in create_fdt_imsic()
602 return g_strdup_printf("/soc/interrupt-controller@%lx", aplic_addr); in fdt_get_aplic_nodename()
626 qemu_fdt_add_subnode(ms->fdt, aplic_name); in create_fdt_one_aplic()
627 qemu_fdt_setprop_string_array(ms->fdt, aplic_name, "compatible", in create_fdt_one_aplic()
630 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "#address-cells", in create_fdt_one_aplic()
632 qemu_fdt_setprop_cell(ms->fdt, aplic_name, in create_fdt_one_aplic()
633 "#interrupt-cells", FDT_APLIC_INT_CELLS); in create_fdt_one_aplic()
634 qemu_fdt_setprop(ms->fdt, aplic_name, "interrupt-controller", NULL, 0); in create_fdt_one_aplic()
636 if (s->aia_type == VIRT_AIA_TYPE_APLIC) { in create_fdt_one_aplic()
637 qemu_fdt_setprop(ms->fdt, aplic_name, "interrupts-extended", in create_fdt_one_aplic()
640 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "msi-parent", msi_phandle); in create_fdt_one_aplic()
643 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "reg", in create_fdt_one_aplic()
645 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,num-sources", in create_fdt_one_aplic()
649 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,children", in create_fdt_one_aplic()
651 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "riscv,delegation", in create_fdt_one_aplic()
660 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "riscv,delegate", in create_fdt_one_aplic()
666 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "phandle", aplic_phandle); in create_fdt_one_aplic()
686 /* M-level APLIC node */ in create_fdt_socket_aplic()
695 /* S-level APLIC node */ in create_fdt_socket_aplic()
705 platform_bus_add_all_fdt_nodes(ms->fdt, aplic_name, in create_fdt_socket_aplic()
718 RISCVCPU hart = s->soc[0].harts[0]; in create_fdt_pmu()
720 qemu_fdt_add_subnode(ms->fdt, pmu_name); in create_fdt_pmu()
721 qemu_fdt_setprop_string(ms->fdt, pmu_name, "compatible", "riscv,pmu"); in create_fdt_pmu()
722 riscv_pmu_generate_fdt_node(ms->fdt, hart.pmu_avail_ctrs, pmu_name); in create_fdt_pmu()
739 qemu_fdt_add_subnode(ms->fdt, "/cpus"); in create_fdt_sockets()
740 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency", in create_fdt_sockets()
744 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); in create_fdt_sockets()
745 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); in create_fdt_sockets()
746 qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); in create_fdt_sockets()
748 intc_phandles = g_new0(uint32_t, ms->smp.cpus); in create_fdt_sockets()
750 phandle_pos = ms->smp.cpus; in create_fdt_sockets()
751 for (socket = (socket_count - 1); socket >= 0; socket--) { in create_fdt_sockets()
753 phandle_pos -= s->soc[socket].num_harts; in create_fdt_sockets()
755 clust_name = g_strdup_printf("/cpus/cpu-map/cluster%d", socket); in create_fdt_sockets()
756 qemu_fdt_add_subnode(ms->fdt, clust_name); in create_fdt_sockets()
763 if (virt_aclint_allowed() && s->have_aclint) { in create_fdt_sockets()
772 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_sockets()
783 ms->smp.cpus); in create_fdt_sockets()
785 phandle_pos = ms->smp.cpus; in create_fdt_sockets()
786 for (socket = (socket_count - 1); socket >= 0; socket--) { in create_fdt_sockets()
787 phandle_pos -= s->soc[socket].num_harts; in create_fdt_sockets()
789 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_sockets()
798 s->soc[socket].num_harts); in create_fdt_sockets()
837 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_virtio()
838 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "virtio,mmio"); in create_fdt_virtio()
839 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_virtio()
842 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", in create_fdt_virtio()
844 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_virtio()
845 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", in create_fdt_virtio()
848 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", in create_fdt_virtio()
863 qemu_fdt_setprop_cell(ms->fdt, name, "#address-cells", in create_fdt_pcie()
865 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", in create_fdt_pcie()
867 qemu_fdt_setprop_cell(ms->fdt, name, "#size-cells", 0x2); in create_fdt_pcie()
868 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_pcie()
869 "pci-host-ecam-generic"); in create_fdt_pcie()
870 qemu_fdt_setprop_string(ms->fdt, name, "device_type", "pci"); in create_fdt_pcie()
871 qemu_fdt_setprop_cell(ms->fdt, name, "linux,pci-domain", 0); in create_fdt_pcie()
872 qemu_fdt_setprop_cells(ms->fdt, name, "bus-range", 0, in create_fdt_pcie()
873 memmap[VIRT_PCIE_ECAM].size / PCIE_MMCFG_SIZE_MIN - 1); in create_fdt_pcie()
874 qemu_fdt_setprop(ms->fdt, name, "dma-coherent", NULL, 0); in create_fdt_pcie()
875 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_pcie()
876 qemu_fdt_setprop_cell(ms->fdt, name, "msi-parent", msi_pcie_phandle); in create_fdt_pcie()
878 qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0, in create_fdt_pcie()
880 qemu_fdt_setprop_sized_cells(ms->fdt, name, "ranges", in create_fdt_pcie()
890 create_pcie_irq_map(s, ms->fdt, name, irq_pcie_phandle); in create_fdt_pcie()
903 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
908 qemu_fdt_setprop_string_array(ms->fdt, name, "compatible", in create_fdt_reset()
911 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_reset()
913 qemu_fdt_setprop_cell(ms->fdt, name, "phandle", test_phandle); in create_fdt_reset()
914 test_phandle = qemu_fdt_get_phandle(ms->fdt, name); in create_fdt_reset()
918 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
919 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-reboot"); in create_fdt_reset()
920 qemu_fdt_setprop_cell(ms->fdt, name, "regmap", test_phandle); in create_fdt_reset()
921 qemu_fdt_setprop_cell(ms->fdt, name, "offset", 0x0); in create_fdt_reset()
922 qemu_fdt_setprop_cell(ms->fdt, name, "value", FINISHER_RESET); in create_fdt_reset()
926 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
927 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-poweroff"); in create_fdt_reset()
928 qemu_fdt_setprop_cell(ms->fdt, name, "regmap", test_phandle); in create_fdt_reset()
929 qemu_fdt_setprop_cell(ms->fdt, name, "offset", 0x0); in create_fdt_reset()
930 qemu_fdt_setprop_cell(ms->fdt, name, "value", FINISHER_PASS); in create_fdt_reset()
941 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_uart()
942 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "ns16550a"); in create_fdt_uart()
943 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_uart()
946 qemu_fdt_setprop_cell(ms->fdt, name, "clock-frequency", 3686400); in create_fdt_uart()
947 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", irq_mmio_phandle); in create_fdt_uart()
948 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_uart()
949 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", UART0_IRQ); in create_fdt_uart()
951 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", UART0_IRQ, 0x4); in create_fdt_uart()
954 qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", name); in create_fdt_uart()
964 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_rtc()
965 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_rtc()
966 "google,goldfish-rtc"); in create_fdt_rtc()
967 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_rtc()
969 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", in create_fdt_rtc()
971 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_rtc()
972 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", RTC_IRQ); in create_fdt_rtc()
974 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", RTC_IRQ, 0x4); in create_fdt_rtc()
985 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_flash()
986 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "cfi-flash"); in create_fdt_flash()
987 qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg", in create_fdt_flash()
990 qemu_fdt_setprop_cell(ms->fdt, name, "bank-width", 4); in create_fdt_flash()
998 g_autofree char *nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); in create_fdt_fw_cfg()
1000 qemu_fdt_add_subnode(ms->fdt, nodename); in create_fdt_fw_cfg()
1001 qemu_fdt_setprop_string(ms->fdt, nodename, in create_fdt_fw_cfg()
1002 "compatible", "qemu,fw-cfg-mmio"); in create_fdt_fw_cfg()
1003 qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", in create_fdt_fw_cfg()
1005 qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); in create_fdt_fw_cfg()
1010 const char compat[] = "virtio,pci-iommu\0pci1af4,1057"; in create_fdt_virtio_iommu()
1011 void *fdt = MACHINE(s)->fdt; in create_fdt_virtio_iommu()
1028 qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); in create_fdt_virtio_iommu()
1031 qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map", in create_fdt_virtio_iommu()
1033 bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); in create_fdt_virtio_iommu()
1038 const char comp[] = "riscv,pci-iommu"; in create_fdt_iommu()
1039 void *fdt = MACHINE(s)->fdt; in create_fdt_iommu()
1051 qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); in create_fdt_iommu()
1055 qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map", in create_fdt_iommu()
1057 bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); in create_fdt_iommu()
1086 ms->fdt = create_device_tree(&s->fdt_size); in create_fdt()
1087 if (!ms->fdt) { in create_fdt()
1092 qemu_fdt_setprop_string(ms->fdt, "/", "model", "riscv-virtio,qemu"); in create_fdt()
1093 qemu_fdt_setprop_string(ms->fdt, "/", "compatible", "riscv-virtio"); in create_fdt()
1094 qemu_fdt_setprop_cell(ms->fdt, "/", "#size-cells", 0x2); in create_fdt()
1095 qemu_fdt_setprop_cell(ms->fdt, "/", "#address-cells", 0x2); in create_fdt()
1097 qemu_fdt_add_subnode(ms->fdt, "/soc"); in create_fdt()
1098 qemu_fdt_setprop(ms->fdt, "/soc", "ranges", NULL, 0); in create_fdt()
1099 qemu_fdt_setprop_string(ms->fdt, "/soc", "compatible", "simple-bus"); in create_fdt()
1100 qemu_fdt_setprop_cell(ms->fdt, "/soc", "#size-cells", 0x2); in create_fdt()
1101 qemu_fdt_setprop_cell(ms->fdt, "/soc", "#address-cells", 0x2); in create_fdt()
1108 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt()
1110 qemu_fdt_add_subnode(ms->fdt, "/chosen"); in create_fdt()
1114 qemu_fdt_setprop(ms->fdt, "/chosen", "rng-seed", in create_fdt()
1129 hwaddr ecam_base = s->memmap[VIRT_PCIE_ECAM].base; in gpex_pcie_init()
1130 hwaddr ecam_size = s->memmap[VIRT_PCIE_ECAM].size; in gpex_pcie_init()
1131 hwaddr mmio_base = s->memmap[VIRT_PCIE_MMIO].base; in gpex_pcie_init()
1132 hwaddr mmio_size = s->memmap[VIRT_PCIE_MMIO].size; in gpex_pcie_init()
1135 hwaddr pio_base = s->memmap[VIRT_PCIE_PIO].base; in gpex_pcie_init()
1136 hwaddr pio_size = s->memmap[VIRT_PCIE_PIO].size; in gpex_pcie_init()
1166 memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", in gpex_pcie_init()
1172 memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", in gpex_pcie_init()
1178 memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high", in gpex_pcie_init()
1192 GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(GPEX_HOST(dev))->bus; in gpex_pcie_init()
1203 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus); in create_fw_cfg()
1214 /* Per-socket PLIC hart topology configuration string */ in virt_create_plic()
1217 /* Per-socket PLIC */ in virt_create_plic()
1222 ((1U << VIRT_IRQCHIP_NUM_PRIO_BITS) - 1), in virt_create_plic()
1247 /* Per-socket M-level IMSICs */ in virt_create_aia()
1257 /* Per-socket S-level IMSICs */ in virt_create_aia()
1268 /* Per-socket M-level APLIC */ in virt_create_aia()
1279 /* Per-socket S-level APLIC */ in virt_create_aia()
1301 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); in create_platform_bus()
1305 s->platform_bus_dev = dev; in create_platform_bus()
1331 smbios_set_defaults("QEMU", product, mc->name); in virt_build_smbios()
1333 if (riscv_is_32bit(&s->soc[0])) { in virt_build_smbios()
1340 mem_array.address = s->memmap[VIRT_DRAM].base; in virt_build_smbios()
1341 mem_array.length = ms->ram_size; in virt_build_smbios()
1350 fw_cfg_add_file(s->fw_cfg, "etc/smbios/smbios-tables", in virt_build_smbios()
1352 fw_cfg_add_file(s->fw_cfg, "etc/smbios/smbios-anchor", in virt_build_smbios()
1365 const char *firmware_name = riscv_default_firmware_name(&s->soc[0]); in virt_machine_done()
1374 if (machine->dtb == NULL) { in virt_machine_done()
1380 * so the "-bios" parameter is not supported when KVM is enabled. in virt_machine_done()
1383 if (machine->firmware) { in virt_machine_done()
1384 if (strcmp(machine->firmware, "none")) { in virt_machine_done()
1390 machine->firmware = g_strdup("none"); in virt_machine_done()
1397 pflash_blk0 = pflash_cfi01_get_blk(s->flash[0]); in virt_machine_done()
1399 if (machine->firmware && !strcmp(machine->firmware, "none") && in virt_machine_done()
1410 * In this case, base of the flash would contain S-mode payload. in virt_machine_done()
1417 if (machine->kernel_filename && !kernel_entry) { in virt_machine_done()
1418 kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0], in virt_machine_done()
1421 kernel_entry = riscv_load_kernel(machine, &s->soc[0], in virt_machine_done()
1428 riscv_load_fdt(fdt_load_addr, machine->fdt); in virt_machine_done()
1431 riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, in virt_machine_done()
1469 if (!virt_aclint_allowed() && s->have_aclint) { in virt_machine_init()
1496 object_initialize_child(OBJECT(machine), soc_name, &s->soc[i], in virt_machine_init()
1498 object_property_set_str(OBJECT(&s->soc[i]), "cpu-type", in virt_machine_init()
1499 machine->cpu_type, &error_abort); in virt_machine_init()
1500 object_property_set_int(OBJECT(&s->soc[i]), "hartid-base", in virt_machine_init()
1502 object_property_set_int(OBJECT(&s->soc[i]), "num-harts", in virt_machine_init()
1504 sysbus_realize(SYS_BUS_DEVICE(&s->soc[i]), &error_fatal); in virt_machine_init()
1506 if (virt_aclint_allowed() && s->have_aclint) { in virt_machine_init()
1507 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in virt_machine_init()
1508 /* Per-socket ACLINT MTIMER */ in virt_machine_init()
1517 /* Per-socket ACLINT MSWI, MTIMER, and SSWI */ in virt_machine_init()
1534 /* Per-socket SiFive CLINT */ in virt_machine_init()
1545 /* Per-socket interrupt controller */ in virt_machine_init()
1546 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in virt_machine_init()
1547 s->irqchip[i] = virt_create_plic(memmap, i, in virt_machine_init()
1550 s->irqchip[i] = virt_create_aia(s->aia_type, s->aia_guests, in virt_machine_init()
1555 /* Try to use different IRQCHIP instance based device type */ in virt_machine_init()
1557 mmio_irqchip = s->irqchip[i]; in virt_machine_init()
1558 virtio_irqchip = s->irqchip[i]; in virt_machine_init()
1559 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1562 virtio_irqchip = s->irqchip[i]; in virt_machine_init()
1563 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1566 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1575 s->aia_guests); in virt_machine_init()
1578 if (riscv_is_32bit(&s->soc[0])) { in virt_machine_init()
1580 /* limit RAM size in a 32-bit system */ in virt_machine_init()
1581 if (machine->ram_size > 10 * GiB) { in virt_machine_init()
1582 machine->ram_size = 10 * GiB; in virt_machine_init()
1590 virt_high_pcie_memmap.base = memmap[VIRT_DRAM].base + machine->ram_size; in virt_machine_init()
1595 s->memmap = virt_memmap; in virt_machine_init()
1599 machine->ram); in virt_machine_init()
1611 s->fw_cfg = create_fw_cfg(machine); in virt_machine_init()
1612 rom_set_fw(s->fw_cfg); in virt_machine_init()
1619 sysbus_create_simple("virtio-mmio", in virt_machine_init()
1635 for (i = 0; i < ARRAY_SIZE(s->flash); i++) { in virt_machine_init()
1636 /* Map legacy -drive if=pflash to machine properties */ in virt_machine_init()
1637 pflash_cfi01_legacy_drive(s->flash[i], in virt_machine_init()
1643 if (machine->dtb) { in virt_machine_init()
1644 machine->fdt = load_device_tree(machine->dtb, &s->fdt_size); in virt_machine_init()
1645 if (!machine->fdt) { in virt_machine_init()
1653 s->machine_done.notify = virt_machine_done; in virt_machine_init()
1654 qemu_add_machine_init_done_notifier(&s->machine_done); in virt_machine_init()
1663 s->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); in virt_machine_instance_init()
1664 s->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); in virt_machine_instance_init()
1665 s->acpi = ON_OFF_AUTO_AUTO; in virt_machine_instance_init()
1672 return g_strdup_printf("%d", s->aia_guests); in virt_get_aia_guests()
1679 s->aia_guests = atoi(val); in virt_set_aia_guests()
1680 if (s->aia_guests < 0 || s->aia_guests > VIRT_IRQCHIP_MAX_GUESTS) { in virt_set_aia_guests()
1692 switch (s->aia_type) { in virt_get_aia()
1697 val = "aplic-imsic"; in virt_get_aia()
1712 s->aia_type = VIRT_AIA_TYPE_NONE; in virt_set_aia()
1714 s->aia_type = VIRT_AIA_TYPE_APLIC; in virt_set_aia()
1715 } else if (!strcmp(val, "aplic-imsic")) { in virt_set_aia()
1716 s->aia_type = VIRT_AIA_TYPE_APLIC_IMSIC; in virt_set_aia()
1720 "aplic-imsic.\n"); in virt_set_aia()
1728 return s->have_aclint; in virt_get_aclint()
1735 s->have_aclint = value; in virt_set_aclint()
1740 return s->acpi != ON_OFF_AUTO_OFF; in virt_is_acpi_enabled()
1747 OnOffAuto acpi = s->acpi; in virt_get_acpi()
1757 visit_type_OnOffAuto(v, name, &s->acpi, errp); in virt_set_acpi()
1779 if (s->platform_bus_dev) { in virt_machine_device_plug_cb()
1783 platform_bus_link_device(PLATFORM_BUS_DEVICE(s->platform_bus_dev), in virt_machine_device_plug_cb()
1802 mc->desc = "RISC-V VirtIO board"; in virt_machine_class_init()
1803 mc->init = virt_machine_init; in virt_machine_class_init()
1804 mc->max_cpus = VIRT_CPUS_MAX; in virt_machine_class_init()
1805 mc->default_cpu_type = TYPE_RISCV_CPU_BASE; in virt_machine_class_init()
1806 mc->block_default_type = IF_VIRTIO; in virt_machine_class_init()
1807 mc->no_cdrom = 1; in virt_machine_class_init()
1808 mc->pci_allow_0_address = true; in virt_machine_class_init()
1809 mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids; in virt_machine_class_init()
1810 mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props; in virt_machine_class_init()
1811 mc->get_default_cpu_node_id = riscv_numa_get_default_cpu_node_id; in virt_machine_class_init()
1812 mc->numa_mem_supported = true; in virt_machine_class_init()
1814 mc->cpu_cluster_has_numa_boundary = true; in virt_machine_class_init()
1815 mc->default_ram_id = "riscv_virt_board.ram"; in virt_machine_class_init()
1816 assert(!mc->get_hotplug_handler); in virt_machine_class_init()
1817 mc->get_hotplug_handler = virt_machine_get_hotplug_handler; in virt_machine_class_init()
1819 hc->plug = virt_machine_device_plug_cb; in virt_machine_class_init()
1838 "none, aplic, and aplic-imsic."); in virt_machine_class_init()
1840 object_class_property_add_str(oc, "aia-guests", in virt_machine_class_init()
1848 object_class_property_set_description(oc, "aia-guests", str); in virt_machine_class_init()