Lines Matching full:nodename
103 char *nodename; in create_fdt() local
133 nodename = g_strdup_printf("/hfclk"); in create_fdt()
134 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
135 qemu_fdt_setprop_cell(fdt, nodename, "phandle", hfclk_phandle); in create_fdt()
136 qemu_fdt_setprop_string(fdt, nodename, "clock-output-names", "hfclk"); in create_fdt()
137 qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", in create_fdt()
139 qemu_fdt_setprop_string(fdt, nodename, "compatible", "fixed-clock"); in create_fdt()
140 qemu_fdt_setprop_cell(fdt, nodename, "#clock-cells", 0x0); in create_fdt()
141 g_free(nodename); in create_fdt()
144 nodename = g_strdup_printf("/rtcclk"); in create_fdt()
145 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
146 qemu_fdt_setprop_cell(fdt, nodename, "phandle", rtcclk_phandle); in create_fdt()
147 qemu_fdt_setprop_string(fdt, nodename, "clock-output-names", "rtcclk"); in create_fdt()
148 qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", in create_fdt()
150 qemu_fdt_setprop_string(fdt, nodename, "compatible", "fixed-clock"); in create_fdt()
151 qemu_fdt_setprop_cell(fdt, nodename, "#clock-cells", 0x0); in create_fdt()
152 g_free(nodename); in create_fdt()
154 nodename = g_strdup_printf("/memory@%lx", in create_fdt()
156 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
157 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
160 qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory"); in create_fdt()
161 g_free(nodename); in create_fdt()
171 nodename = g_strdup_printf("/cpus/cpu@%d", cpu); in create_fdt()
173 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
177 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv32"); in create_fdt()
179 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48"); in create_fdt()
181 riscv_isa_write_fdt(&s->soc.u_cpus.harts[cpu - 1], fdt, nodename); in create_fdt()
183 riscv_isa_write_fdt(&s->soc.e_cpus.harts[0], fdt, nodename); in create_fdt()
185 qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv"); in create_fdt()
186 qemu_fdt_setprop_string(fdt, nodename, "status", "okay"); in create_fdt()
187 qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu); in create_fdt()
188 qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu"); in create_fdt()
195 g_free(nodename); in create_fdt()
200 nodename = in create_fdt()
202 uint32_t intc_phandle = qemu_fdt_get_phandle(fdt, nodename); in create_fdt()
207 g_free(nodename); in create_fdt()
209 nodename = g_strdup_printf("/soc/clint@%lx", in create_fdt()
211 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
212 qemu_fdt_setprop_string_array(fdt, nodename, "compatible", in create_fdt()
214 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
217 qemu_fdt_setprop(fdt, nodename, "interrupts-extended", in create_fdt()
220 g_free(nodename); in create_fdt()
222 nodename = g_strdup_printf("/soc/otp@%lx", in create_fdt()
224 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
225 qemu_fdt_setprop_cell(fdt, nodename, "fuse-count", SIFIVE_U_OTP_REG_SIZE); in create_fdt()
226 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
229 qemu_fdt_setprop_string(fdt, nodename, "compatible", in create_fdt()
231 g_free(nodename); in create_fdt()
234 nodename = g_strdup_printf("/soc/clock-controller@%lx", in create_fdt()
236 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
237 qemu_fdt_setprop_cell(fdt, nodename, "phandle", prci_phandle); in create_fdt()
238 qemu_fdt_setprop_cell(fdt, nodename, "#clock-cells", 0x1); in create_fdt()
239 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
241 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
244 qemu_fdt_setprop_string(fdt, nodename, "compatible", in create_fdt()
246 g_free(nodename); in create_fdt()
251 nodename = in create_fdt()
253 uint32_t intc_phandle = qemu_fdt_get_phandle(fdt, nodename); in create_fdt()
264 g_free(nodename); in create_fdt()
266 nodename = g_strdup_printf("/soc/interrupt-controller@%lx", in create_fdt()
268 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
269 qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1); in create_fdt()
270 qemu_fdt_setprop_string_array(fdt, nodename, "compatible", in create_fdt()
272 qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); in create_fdt()
273 qemu_fdt_setprop(fdt, nodename, "interrupts-extended", in create_fdt()
275 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
278 qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", in create_fdt()
280 qemu_fdt_setprop_cell(fdt, nodename, "phandle", plic_phandle); in create_fdt()
281 plic_phandle = qemu_fdt_get_phandle(fdt, nodename); in create_fdt()
283 g_free(nodename); in create_fdt()
286 nodename = g_strdup_printf("/soc/gpio@%lx", in create_fdt()
288 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
289 qemu_fdt_setprop_cell(fdt, nodename, "phandle", gpio_phandle); in create_fdt()
290 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
292 qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 2); in create_fdt()
293 qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); in create_fdt()
294 qemu_fdt_setprop_cell(fdt, nodename, "#gpio-cells", 2); in create_fdt()
295 qemu_fdt_setprop(fdt, nodename, "gpio-controller", NULL, 0); in create_fdt()
296 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
299 qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_GPIO_IRQ0, in create_fdt()
305 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
306 qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,gpio0"); in create_fdt()
307 g_free(nodename); in create_fdt()
309 nodename = g_strdup_printf("/gpio-restart"); in create_fdt()
310 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
311 qemu_fdt_setprop_cells(fdt, nodename, "gpios", gpio_phandle, 10, 1); in create_fdt()
312 qemu_fdt_setprop_string(fdt, nodename, "compatible", "gpio-restart"); in create_fdt()
313 g_free(nodename); in create_fdt()
315 nodename = g_strdup_printf("/soc/dma@%lx", in create_fdt()
317 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
318 qemu_fdt_setprop_cell(fdt, nodename, "#dma-cells", 1); in create_fdt()
319 qemu_fdt_setprop_cells(fdt, nodename, "interrupts", in create_fdt()
323 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
324 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
327 qemu_fdt_setprop_string(fdt, nodename, "compatible", in create_fdt()
329 g_free(nodename); in create_fdt()
331 nodename = g_strdup_printf("/soc/cache-controller@%lx", in create_fdt()
333 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
334 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
337 qemu_fdt_setprop_cells(fdt, nodename, "interrupts", in create_fdt()
339 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
340 qemu_fdt_setprop(fdt, nodename, "cache-unified", NULL, 0); in create_fdt()
341 qemu_fdt_setprop_cell(fdt, nodename, "cache-size", 2097152); in create_fdt()
342 qemu_fdt_setprop_cell(fdt, nodename, "cache-sets", 1024); in create_fdt()
343 qemu_fdt_setprop_cell(fdt, nodename, "cache-level", 2); in create_fdt()
344 qemu_fdt_setprop_cell(fdt, nodename, "cache-block-size", 64); in create_fdt()
345 qemu_fdt_setprop_string(fdt, nodename, "compatible", in create_fdt()
347 g_free(nodename); in create_fdt()
349 nodename = g_strdup_printf("/soc/spi@%lx", in create_fdt()
351 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
352 qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 0); in create_fdt()
353 qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1); in create_fdt()
354 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
356 qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_QSPI2_IRQ); in create_fdt()
357 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
358 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
361 qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,spi0"); in create_fdt()
362 g_free(nodename); in create_fdt()
364 nodename = g_strdup_printf("/soc/spi@%lx/mmc@0", in create_fdt()
366 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
367 qemu_fdt_setprop(fdt, nodename, "disable-wp", NULL, 0); in create_fdt()
368 qemu_fdt_setprop_cells(fdt, nodename, "voltage-ranges", 3300, 3300); in create_fdt()
369 qemu_fdt_setprop_cell(fdt, nodename, "spi-max-frequency", 20000000); in create_fdt()
370 qemu_fdt_setprop_cell(fdt, nodename, "reg", 0); in create_fdt()
371 qemu_fdt_setprop_string(fdt, nodename, "compatible", "mmc-spi-slot"); in create_fdt()
372 g_free(nodename); in create_fdt()
374 nodename = g_strdup_printf("/soc/spi@%lx", in create_fdt()
376 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
377 qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 0); in create_fdt()
378 qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1); in create_fdt()
379 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
381 qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_QSPI0_IRQ); in create_fdt()
382 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
383 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
386 qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,spi0"); in create_fdt()
387 g_free(nodename); in create_fdt()
389 nodename = g_strdup_printf("/soc/spi@%lx/flash@0", in create_fdt()
391 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
392 qemu_fdt_setprop_cell(fdt, nodename, "spi-rx-bus-width", 4); in create_fdt()
393 qemu_fdt_setprop_cell(fdt, nodename, "spi-tx-bus-width", 4); in create_fdt()
394 qemu_fdt_setprop(fdt, nodename, "m25p,fast-read", NULL, 0); in create_fdt()
395 qemu_fdt_setprop_cell(fdt, nodename, "spi-max-frequency", 50000000); in create_fdt()
396 qemu_fdt_setprop_cell(fdt, nodename, "reg", 0); in create_fdt()
397 qemu_fdt_setprop_string(fdt, nodename, "compatible", "jedec,spi-nor"); in create_fdt()
398 g_free(nodename); in create_fdt()
401 nodename = g_strdup_printf("/soc/ethernet@%lx", in create_fdt()
403 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
404 qemu_fdt_setprop_string(fdt, nodename, "compatible", in create_fdt()
406 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
411 qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control"); in create_fdt()
412 qemu_fdt_setprop_string(fdt, nodename, "phy-mode", "gmii"); in create_fdt()
413 qemu_fdt_setprop_cell(fdt, nodename, "phy-handle", phy_phandle); in create_fdt()
414 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
415 qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ); in create_fdt()
416 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
418 qemu_fdt_setprop_string_array(fdt, nodename, "clock-names", in create_fdt()
420 qemu_fdt_setprop(fdt, nodename, "local-mac-address", in create_fdt()
422 qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1); in create_fdt()
423 qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 0); in create_fdt()
426 qemu_fdt_setprop_string(fdt, "/aliases", "ethernet0", nodename); in create_fdt()
428 g_free(nodename); in create_fdt()
430 nodename = g_strdup_printf("/soc/ethernet@%lx/ethernet-phy@0", in create_fdt()
432 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
433 qemu_fdt_setprop_cell(fdt, nodename, "phandle", phy_phandle); in create_fdt()
434 qemu_fdt_setprop_cell(fdt, nodename, "reg", 0x0); in create_fdt()
435 g_free(nodename); in create_fdt()
437 nodename = g_strdup_printf("/soc/pwm@%lx", in create_fdt()
439 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
440 qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,pwm0"); in create_fdt()
441 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
444 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
445 qemu_fdt_setprop_cells(fdt, nodename, "interrupts", in create_fdt()
448 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
450 qemu_fdt_setprop_cell(fdt, nodename, "#pwm-cells", 0); in create_fdt()
451 g_free(nodename); in create_fdt()
453 nodename = g_strdup_printf("/soc/pwm@%lx", in create_fdt()
455 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
456 qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,pwm0"); in create_fdt()
457 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
460 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
461 qemu_fdt_setprop_cells(fdt, nodename, "interrupts", in create_fdt()
464 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
466 qemu_fdt_setprop_cell(fdt, nodename, "#pwm-cells", 0); in create_fdt()
467 g_free(nodename); in create_fdt()
469 nodename = g_strdup_printf("/soc/serial@%lx", in create_fdt()
471 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
472 qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,uart0"); in create_fdt()
473 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
476 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
478 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
479 qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_UART1_IRQ); in create_fdt()
481 qemu_fdt_setprop_string(fdt, "/aliases", "serial1", nodename); in create_fdt()
482 g_free(nodename); in create_fdt()
484 nodename = g_strdup_printf("/soc/serial@%lx", in create_fdt()
486 qemu_fdt_add_subnode(fdt, nodename); in create_fdt()
487 qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,uart0"); in create_fdt()
488 qemu_fdt_setprop_cells(fdt, nodename, "reg", in create_fdt()
491 qemu_fdt_setprop_cells(fdt, nodename, "clocks", in create_fdt()
493 qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); in create_fdt()
494 qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ); in create_fdt()
497 qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename); in create_fdt()
498 qemu_fdt_setprop_string(fdt, "/aliases", "serial0", nodename); in create_fdt()
500 g_free(nodename); in create_fdt()