Lines Matching full:sifive

2  * QEMU RISC-V Board Compatible with SiFive Freedom E SDK
4  * Copyright (c) 2017 SiFive, Inc.
6  * Provides a board compatible with the SiFive Freedom E SDK:
148     mc->desc = "RISC-V Board compatible with SiFive E SDK";  in sifive_e_machine_class_init()
152     mc->default_ram_id = "riscv.sifive.e.ram";  in sifive_e_machine_class_init()
186     object_initialize_child(obj, "riscv.sifive.e.gpio0", &s->gpio,  in type_init()
188     object_initialize_child(obj, "riscv.sifive.e.aon", &s->aon,  in type_init()
204     memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom",  in sifive_e_soc_realize()
263     create_unimplemented_device("riscv.sifive.e.qspi0",  in sifive_e_soc_realize()
265     create_unimplemented_device("riscv.sifive.e.pwm0",  in sifive_e_soc_realize()
269     create_unimplemented_device("riscv.sifive.e.qspi1",  in sifive_e_soc_realize()
271     create_unimplemented_device("riscv.sifive.e.pwm1",  in sifive_e_soc_realize()
273     create_unimplemented_device("riscv.sifive.e.qspi2",  in sifive_e_soc_realize()
275     create_unimplemented_device("riscv.sifive.e.pwm2",  in sifive_e_soc_realize()
279     memory_region_init_rom(&s->xip_mem, OBJECT(dev), "riscv.sifive.e.xip",  in sifive_e_soc_realize()