79     ppc4xx_l2sram_t *l2sram = opaque;  in dcr_read_l2sram()  local
91         ret = l2sram->l2cache[dcrn - DCR_L2CACHE_BASE];  in dcr_read_l2sram()
105         ret = l2sram->isram0[dcrn - DCR_ISRAM0_BASE];  in dcr_read_l2sram()
161     ppc4xx_l2sram_t *l2sram = opaque;  in l2sram_reset()  local
163     memset(l2sram->l2cache, 0, sizeof(l2sram->l2cache));  in l2sram_reset()
164     l2sram->l2cache[DCR_L2CACHE_STAT - DCR_L2CACHE_BASE] = 0x80000000;  in l2sram_reset()
165     memset(l2sram->isram0, 0, sizeof(l2sram->isram0));  in l2sram_reset()
170     ppc4xx_l2sram_t *l2sram;  in ppc4xx_l2sram_init()  local
172     l2sram = g_malloc0(sizeof(*l2sram));  in ppc4xx_l2sram_init()
174     memory_region_init_ram(&l2sram->bank[0], NULL, "ppc4xx.l2sram_bank0",  in ppc4xx_l2sram_init()
176     memory_region_init_ram(&l2sram->bank[1], NULL, "ppc4xx.l2sram_bank1",  in ppc4xx_l2sram_init()
178     memory_region_init_ram(&l2sram->bank[2], NULL, "ppc4xx.l2sram_bank2",  in ppc4xx_l2sram_init()
180     memory_region_init_ram(&l2sram->bank[3], NULL, "ppc4xx.l2sram_bank3",  in ppc4xx_l2sram_init()
182     qemu_register_reset(&l2sram_reset, l2sram);  in ppc4xx_l2sram_init()
184                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
186                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
188                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
190                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
192                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
194                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
196                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
198                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
201                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
203                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
205                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
207                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
209                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
211                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
214                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
216                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()
218                      l2sram, &dcr_read_l2sram, &dcr_write_l2sram);  in ppc4xx_l2sram_init()