41 static void cpu_ppc_tb_stop (CPUPPCState *env);
42 static void cpu_ppc_tb_start (CPUPPCState *env);
46     CPUPPCState *env = &cpu->env;  in ppc_set_irq()
75     CPUPPCState *env = &cpu->env;  in ppc6xx_set_irq()
155     CPUPPCState *env = &cpu->env;  in ppc970_set_irq()
281     CPUPPCState *env = &cpu->env;  in ppc40x_core_reset()
294     CPUPPCState *env = &cpu->env;  in ppc40x_chip_reset()
312 void store_40x_dbcr0(CPUPPCState *env, uint32_t val)  in store_40x_dbcr0()
343     CPUPPCState *env = &cpu->env;  in ppc40x_set_irq()
418     CPUPPCState *env = &cpu->env;  in ppce500_set_irq()
515 uint64_t cpu_ppc_load_tbl (CPUPPCState *env)  in cpu_ppc_load_tbl()
531 static inline uint32_t _cpu_ppc_load_tbu(CPUPPCState *env)  in _cpu_ppc_load_tbu()
543 uint32_t cpu_ppc_load_tbu (CPUPPCState *env)  in cpu_ppc_load_tbu()
560 void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value)  in cpu_ppc_store_tbl()
571 static inline void _cpu_ppc_store_tbu(CPUPPCState *env, uint32_t value)  in _cpu_ppc_store_tbu()
583 void cpu_ppc_store_tbu (CPUPPCState *env, uint32_t value)  in cpu_ppc_store_tbu()
588 uint64_t cpu_ppc_load_atbl (CPUPPCState *env)  in cpu_ppc_load_atbl()
600 uint32_t cpu_ppc_load_atbu (CPUPPCState *env)  in cpu_ppc_load_atbu()
612 void cpu_ppc_store_atbl (CPUPPCState *env, uint32_t value)  in cpu_ppc_store_atbl()
623 void cpu_ppc_store_atbu (CPUPPCState *env, uint32_t value)  in cpu_ppc_store_atbu()
635 void cpu_ppc_increase_tb_by_offset(CPUPPCState *env, int64_t offset)  in cpu_ppc_increase_tb_by_offset()
640 void cpu_ppc_decrease_tb_by_offset(CPUPPCState *env, int64_t offset)  in cpu_ppc_decrease_tb_by_offset()
645 uint64_t cpu_ppc_load_vtb(CPUPPCState *env)  in cpu_ppc_load_vtb()
653 void cpu_ppc_store_vtb(CPUPPCState *env, uint64_t value)  in cpu_ppc_store_vtb()
661 void cpu_ppc_store_tbu40(CPUPPCState *env, uint64_t value)  in cpu_ppc_store_tbu40()
673 static void cpu_ppc_tb_stop (CPUPPCState *env)  in cpu_ppc_tb_stop()
695 static void cpu_ppc_tb_start (CPUPPCState *env)  in cpu_ppc_tb_start()
716 bool ppc_decr_clear_on_delivery(CPUPPCState *env)  in ppc_decr_clear_on_delivery()
723 static inline int64_t __cpu_ppc_load_decr(CPUPPCState *env, int64_t now,  in __cpu_ppc_load_decr()
744 static target_ulong _cpu_ppc_load_decr(CPUPPCState *env, int64_t now)  in _cpu_ppc_load_decr()
763 target_ulong cpu_ppc_load_decr(CPUPPCState *env)  in cpu_ppc_load_decr()
772 static target_ulong _cpu_ppc_load_hdecr(CPUPPCState *env, int64_t now)  in _cpu_ppc_load_hdecr()
791 target_ulong cpu_ppc_load_hdecr(CPUPPCState *env)  in cpu_ppc_load_hdecr()
796 uint64_t cpu_ppc_load_purr (CPUPPCState *env)  in cpu_ppc_load_purr()
821     CPUPPCState *env = &cpu->env;  in cpu_ppc_hdecr_excp()
847     CPUPPCState *env = &cpu->env;  in __cpu_ppc_store_decr()
906 void cpu_ppc_store_decr(CPUPPCState *env, target_ulong value)  in cpu_ppc_store_decr()
950 void cpu_ppc_store_hdecr(CPUPPCState *env, target_ulong value)  in cpu_ppc_store_hdecr()
969 static void _cpu_ppc_store_purr(CPUPPCState *env, int64_t now, uint64_t value)  in _cpu_ppc_store_purr()
976 void cpu_ppc_store_purr(CPUPPCState *env, uint64_t value)  in cpu_ppc_store_purr()
1088 void cpu_ppc_tb_init(CPUPPCState *env, uint32_t freq)  in cpu_ppc_tb_init()
1114 void cpu_ppc_tb_reset(CPUPPCState *env)  in cpu_ppc_tb_reset()
1138 void cpu_ppc_tb_free(CPUPPCState *env)  in cpu_ppc_tb_free()
1146 void cpu_ppc_hdecr_init(CPUPPCState *env)  in cpu_ppc_hdecr_init()
1156 void cpu_ppc_hdecr_exit(CPUPPCState *env)  in cpu_ppc_hdecr_exit()
1186     CPUPPCState *env = &cpu->env;  in cpu_4xx_fit_cb()
1222 static void start_stop_pit (CPUPPCState *env, ppc_tb_t *tb_env, int is_excp)  in start_stop_pit()
1252     CPUPPCState *env = &cpu->env;  in cpu_4xx_pit_cb()
1273     CPUPPCState *env = &cpu->env;  in cpu_4xx_wdt_cb()
1335 void store_40x_pit (CPUPPCState *env, target_ulong val)  in store_40x_pit()
1347 target_ulong load_40x_pit (CPUPPCState *env)  in load_40x_pit()
1352 void store_40x_tsr(CPUPPCState *env, target_ulong val)  in store_40x_tsr()
1364 void store_40x_tcr(CPUPPCState *env, target_ulong val)  in store_40x_tcr()
1379     CPUPPCState *env = opaque;  in ppc_40x_set_tb_clk()
1388 clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq,  in ppc_40x_timers_init()
1478 int ppc_dcr_register (CPUPPCState *env, int dcrn, void *opaque,  in ppc_dcr_register()
1501 int ppc_dcr_init (CPUPPCState *env, int (*read_error)(int dcrn),  in ppc_dcr_init()
1518     CPUPPCState *env = &cpu->env;  in ppc_cpu_pir()
1524     CPUPPCState *env = &cpu->env;  in ppc_cpu_tir()
1545     CPUPPCState *env = &cpu->env;  in ppc_irq_reset()