Lines Matching +full:versatile +full:- +full:pci
2 * ARM Versatile/PB PCI host controller
4 * Copyright (c) 2006-2009 CodeSourcery.
15 #include "hw/pci/pci_device.h"
16 #include "hw/pci/pci_bus.h"
17 #include "hw/pci/pci_host.h"
18 #include "hw/qdev-properties.h"
24 * PCI IRQs to system interrupt lines. Unfortunately the Linux
45 * work only for every fourth PCI card, and only if (like old
46 * QEMU) the PCI host device is at slot 0 rather than where
59 * -------------------------------
82 /* Containers representing the PCI address spaces */
85 /* Alias regions into PCI address spaces which we expose as sysbus regions.
113 * for realview and versatile variants of the controller. in pci_vpb_update_window()
116 if (s->realview) { in pci_vpb_update_window()
118 * top bits of PCI address. in pci_vpb_update_window()
120 offset = s->imap[i] & ~(s->mem_win_size[i] - 1); in pci_vpb_update_window()
122 /* Bottom 4 bits of register provide top 4 bits of PCI address */ in pci_vpb_update_window()
123 offset = s->imap[i] << 28; in pci_vpb_update_window()
125 memory_region_set_alias_offset(&s->pci_mem_window[i], offset); in pci_vpb_update_window()
146 .name = "versatile-pci",
189 int win = (addr - PCI_IMAP0) >> 2; in pci_vpb_reg_write()
190 s->imap[win] = val; in pci_vpb_reg_write()
195 s->selfid = val; in pci_vpb_reg_write()
198 s->flags = val; in pci_vpb_reg_write()
204 int win = (addr - PCI_SMAP0) >> 2; in pci_vpb_reg_write()
205 s->smap[win] = val; in pci_vpb_reg_write()
225 int win = (addr - PCI_IMAP0) >> 2; in pci_vpb_reg_read()
226 return s->imap[win]; in pci_vpb_reg_read()
229 return s->selfid; in pci_vpb_reg_read()
231 return s->flags; in pci_vpb_reg_read()
236 int win = (addr - PCI_SMAP0) >> 2; in pci_vpb_reg_read()
237 return s->smap[win]; in pci_vpb_reg_read()
295 if (!s->realview && (addr & 0xff) == PCI_INTERRUPT_LINE in pci_vpb_config_write()
296 && s->irq_mapping == PCI_VPB_IRQMAP_ASSUME_OK) { in pci_vpb_config_write()
298 s->irq_mapping = pci_vpb_broken_irq(PCI_SLOT(devfn), val); in pci_vpb_config_write()
300 pci_data_write(&s->pci_bus, addr, val, size); in pci_vpb_config_write()
308 val = pci_data_read(&s->pci_bus, addr, size); in pci_vpb_config_read()
322 if (s->irq_mapping == PCI_VPB_IRQMAP_BROKEN) { in pci_vpb_map_irq()
339 * the INTB connection on the board PCI edge connector, P_nINTB in pci_vpb_map_irq()
374 s->imap[0] = 0; in pci_vpb_reset()
375 s->imap[1] = 0; in pci_vpb_reset()
376 s->imap[2] = 0; in pci_vpb_reset()
377 s->smap[0] = 0; in pci_vpb_reset()
378 s->smap[1] = 0; in pci_vpb_reset()
379 s->smap[2] = 0; in pci_vpb_reset()
380 s->selfid = 0; in pci_vpb_reset()
381 s->flags = 0; in pci_vpb_reset()
382 s->irq_mapping = s->irq_mapping_prop; in pci_vpb_reset()
392 s->mem_win_size[0] = 0x0c000000; in pci_vpb_init()
393 s->mem_win_size[1] = 0x10000000; in pci_vpb_init()
394 s->mem_win_size[2] = 0x10000000; in pci_vpb_init()
405 memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 4 * GiB); in pci_vpb_realize()
406 memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 4 * GiB); in pci_vpb_realize()
408 pci_root_bus_init(&s->pci_bus, sizeof(s->pci_bus), dev, "pci", in pci_vpb_realize()
409 &s->pci_mem_space, &s->pci_io_space, in pci_vpb_realize()
411 h->bus = &s->pci_bus; in pci_vpb_realize()
413 object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST); in pci_vpb_realize()
416 sysbus_init_irq(sbd, &s->irq[i]); in pci_vpb_realize()
419 if (s->realview) { in pci_vpb_realize()
425 pci_bus_irqs(&s->pci_bus, pci_vpb_set_irq, s->irq, 4); in pci_vpb_realize()
426 pci_bus_map_irqs(&s->pci_bus, mapfn); in pci_vpb_realize()
430 * 1 : PCI self config window in pci_vpb_realize()
431 * 2 : PCI config window in pci_vpb_realize()
432 * 3 : PCI IO window in pci_vpb_realize()
433 * 4..6 : PCI memory windows in pci_vpb_realize()
435 memory_region_init_io(&s->controlregs, OBJECT(s), &pci_vpb_reg_ops, s, in pci_vpb_realize()
436 "pci-vpb-regs", 0x1000); in pci_vpb_realize()
437 sysbus_init_mmio(sbd, &s->controlregs); in pci_vpb_realize()
438 memory_region_init_io(&s->mem_config, OBJECT(s), &pci_vpb_config_ops, s, in pci_vpb_realize()
439 "pci-vpb-selfconfig", 0x1000000); in pci_vpb_realize()
440 sysbus_init_mmio(sbd, &s->mem_config); in pci_vpb_realize()
441 memory_region_init_io(&s->mem_config2, OBJECT(s), &pci_vpb_config_ops, s, in pci_vpb_realize()
442 "pci-vpb-config", 0x1000000); in pci_vpb_realize()
443 sysbus_init_mmio(sbd, &s->mem_config2); in pci_vpb_realize()
446 * its size is the same for both realview and versatile. in pci_vpb_realize()
448 memory_region_init_alias(&s->pci_io_window, OBJECT(s), "pci-vbp-io-window", in pci_vpb_realize()
449 &s->pci_io_space, 0, 0x100000); in pci_vpb_realize()
451 sysbus_init_mmio(sbd, &s->pci_io_space); in pci_vpb_realize()
454 * PCI memory space. The sizes vary from board to board; the base in pci_vpb_realize()
458 memory_region_init_alias(&s->pci_mem_window[i], OBJECT(s), "pci-vbp-window", in pci_vpb_realize()
459 &s->pci_mem_space, 0, s->mem_win_size[i]); in pci_vpb_realize()
460 sysbus_init_mmio(sbd, &s->pci_mem_window[i]); in pci_vpb_realize()
464 qdev_realize(DEVICE(&s->pci_dev), BUS(&s->pci_bus), errp); in pci_vpb_realize()
469 pci_set_word(d->config + PCI_STATUS, in versatile_pci_host_realize()
471 pci_set_byte(d->config + PCI_LATENCY_TIMER, 0x10); in versatile_pci_host_realize()
479 k->realize = versatile_pci_host_realize; in versatile_pci_host_class_init()
480 k->vendor_id = PCI_VENDOR_ID_XILINX; in versatile_pci_host_class_init()
481 k->device_id = PCI_DEVICE_ID_XILINX_XC2VP30; in versatile_pci_host_class_init()
482 k->class_id = PCI_CLASS_PROCESSOR_CO; in versatile_pci_host_class_init()
484 * PCI-facing part of the host bridge, not usable without the in versatile_pci_host_class_init()
485 * host-facing part, which can't be device_add'ed, yet. in versatile_pci_host_class_init()
487 dc->user_creatable = false; in versatile_pci_host_class_init()
502 DEFINE_PROP_UINT8("broken-irq-mapping", PCIVPBState, irq_mapping_prop,
511 dc->realize = pci_vpb_realize; in pci_vpb_class_init()
513 dc->vmsd = &pci_vpb_vmstate; in pci_vpb_class_init()
529 s->realview = 1; in pci_realview_init()
530 /* The PCI window sizes are different on Realview boards */ in pci_realview_init()
531 s->mem_win_size[0] = 0x01000000; in pci_realview_init()
532 s->mem_win_size[1] = 0x04000000; in pci_realview_init()
533 s->mem_win_size[2] = 0x08000000; in pci_realview_init()