Lines Matching refs:phb3_error

25 #define phb3_error(phb, fmt, ...)                                       \  macro
288 phb3_error(phb, "invalid IODA table %d", table); in pnv_phb3_ioda_access()
393 phb3_error(phb, "LSIs out of reach: LSI base=%d total irq=%d", global, in pnv_phb3_remap_irqs()
398 phb3_error(phb, "More interrupts than supported: %d", count); in pnv_phb3_remap_irqs()
402 phb3_error(phb, "IRQ compare bits not in mask: comp=0x%x mask=0x%x", in pnv_phb3_remap_irqs()
483 phb3_error(phb, "Invalid register access, offset: 0x%"PRIx64" size: %d", in pnv_phb3_reg_write()
604 phb3_error(phb, "Invalid register access, offset: 0x%"PRIx64" size: %d", in pnv_phb3_reg_read()
692 phb3_error(phb, "Unknown IRQ to set %d", irq_num); in pnv_phb3_set_irq()
711 phb3_error(ds->phb, "DMA with RTT BAR disabled !"); in pnv_phb3_resolve_pe()
722 phb3_error(ds->phb, "Failed to read RTT entry at 0x%"PRIx64, addr); in pnv_phb3_resolve_pe()
730 phb3_error(ds->phb, "RTE for RID 0x%x invalid (%04x", ds->devfn, rte); in pnv_phb3_resolve_pe()
750 phb3_error(phb, "Invalid #levels in TVE %d", lev); in pnv_phb3_translate_tve()
763 phb3_error(phb, "xlate for invalid non-translate TVE"); in pnv_phb3_translate_tve()
779 phb3_error(phb, "xlate for invalid translated TVE"); in pnv_phb3_translate_tve()
803 phb3_error(phb, "Failed to read TCE at 0x%"PRIx64, taddr); in pnv_phb3_translate_tve()
810 phb3_error(phb, "Invalid indirect TCE at 0x%"PRIx64, taddr); in pnv_phb3_translate_tve()
811 phb3_error(phb, " xlate %"PRIx64":%c TVE=%"PRIx64, addr, in pnv_phb3_translate_tve()
813 phb3_error(phb, " tta=%"PRIx64" lev=%d tts=%d tps=%d", in pnv_phb3_translate_tve()
823 phb3_error(phb, "TCE access fault at 0x%"PRIx64, taddr); in pnv_phb3_translate_tve()
824 phb3_error(phb, " xlate %"PRIx64":%c TVE=%"PRIx64, addr, in pnv_phb3_translate_tve()
826 phb3_error(phb, " tta=%"PRIx64" lev=%d tts=%d tps=%d", in pnv_phb3_translate_tve()
857 phb3_error(phb, "Failed to resolve PE# for bus @%p (%d) devfn 0x%x", in pnv_phb3_translate_iommu()
869 phb3_error(phb, "xlate on 32-bit MSI region"); in pnv_phb3_translate_iommu()
878 phb3_error(phb, "xlate on 64-bit MSI region"); in pnv_phb3_translate_iommu()
881 phb3_error(phb, "xlate on unsupported address 0x%"PRIx64, addr); in pnv_phb3_translate_iommu()
915 phb3_error(ds->phb, "Failed to resolve PE# for bus @%p (%d) devfn 0x%x", in pnv_phb3_msi_write()
928 phb3_error(ds->phb, "invalid read @ 0x%" HWADDR_PRIx, addr); in pnv_phb3_msi_read()