6  * Code loosely based on q35.c.
28  * http://www.kernel.org/doc/Documentation/devicetree/bindings/pci/host-generic-pci.txt
35 #include "hw/pci-host/gpex.h"
36 #include "hw/qdev-properties.h"
48     qemu_set_irq(s->irq[irq_num], level);  in gpex_set_irq()
54         return -EINVAL;  in gpex_set_irq_num()
57     s->irq_num[index] = gsi;  in gpex_set_irq_num()
65     int gsi = s->irq_num[pin];  in gpex_route_intx_pin_to_irq()
86     sysbus_init_mmio(sbd, &pex->mmio);  in gpex_host_realize()
101      * addresses read as -1 and ignore writes"; this is traditional  in gpex_host_realize()
103      * but expected by much PCI-using guest software, including Linux.  in gpex_host_realize()
111     memory_region_init(&s->io_mmio, OBJECT(s), "gpex_mmio", UINT64_MAX);  in gpex_host_realize()
112     memory_region_init(&s->io_ioport, OBJECT(s), "gpex_ioport", 64 * 1024);  in gpex_host_realize()
114     if (s->allow_unmapped_accesses) {  in gpex_host_realize()
115         memory_region_init_io(&s->io_mmio_window, OBJECT(s),  in gpex_host_realize()
118         memory_region_init_io(&s->io_ioport_window, OBJECT(s),  in gpex_host_realize()
122         memory_region_add_subregion(&s->io_mmio_window, 0, &s->io_mmio);  in gpex_host_realize()
123         memory_region_add_subregion(&s->io_ioport_window, 0, &s->io_ioport);  in gpex_host_realize()
124         sysbus_init_mmio(sbd, &s->io_mmio_window);  in gpex_host_realize()
125         sysbus_init_mmio(sbd, &s->io_ioport_window);  in gpex_host_realize()
127         sysbus_init_mmio(sbd, &s->io_mmio);  in gpex_host_realize()
128         sysbus_init_mmio(sbd, &s->io_ioport);  in gpex_host_realize()
132         sysbus_init_irq(sbd, &s->irq[i]);  in gpex_host_realize()
133         s->irq_num[i] = -1;  in gpex_host_realize()
136     pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,  in gpex_host_realize()
137                                      pci_swizzle_map_irq_fn, s, &s->io_mmio,  in gpex_host_realize()
138                                      &s->io_ioport, 0, 4, TYPE_PCIE_BUS);  in gpex_host_realize()
140     pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);  in gpex_host_realize()
141     qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal);  in gpex_host_realize()
153      * (discarding writes and returning -1 for reads) rather than aborting.
155     DEFINE_PROP_BOOL("allow-unmapped-accesses", GPEXHost,
157     DEFINE_PROP_UINT64(PCI_HOST_ECAM_BASE, GPEXHost, gpex_cfg.ecam.base, 0),
158     DEFINE_PROP_SIZE(PCI_HOST_ECAM_SIZE, GPEXHost, gpex_cfg.ecam.size, 0),
177     hc->root_bus_path = gpex_host_root_bus_path;  in gpex_host_class_init()
178     dc->realize = gpex_host_realize;  in gpex_host_class_init()
179     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);  in gpex_host_class_init()
180     dc->fw_name = "pci";  in gpex_host_class_init()
187     GPEXRootState *root = &s->gpex_root;  in gpex_host_initfn()
221     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);  in gpex_root_class_init()
222     dc->desc = "QEMU generic PCIe host bridge";  in gpex_root_class_init()
223     dc->vmsd = &vmstate_gpex_root;  in gpex_root_class_init()
224     k->vendor_id = PCI_VENDOR_ID_REDHAT;  in gpex_root_class_init()
225     k->device_id = PCI_DEVICE_ID_REDHAT_PCIE_HOST;  in gpex_root_class_init()
226     k->revision = 0;  in gpex_root_class_init()
227     k->class_id = PCI_CLASS_BRIDGE_HOST;  in gpex_root_class_init()
229      * PCI-facing part of the host bridge, not usable without the  in gpex_root_class_init()
230      * host-facing part, which can't be device_add'ed, yet.  in gpex_root_class_init()
232     dc->user_creatable = false;  in gpex_root_class_init()