Lines Matching full:viewport
141 DesignwarePCIEViewport *viewport = in designware_pcie_root_config_read() local
193 val = extract64(viewport->base, in designware_pcie_root_config_read()
199 val = extract64(viewport->target, in designware_pcie_root_config_read()
205 val = viewport->limit; in designware_pcie_root_config_read()
210 val = viewport->cr[(address - DESIGNWARE_PCIE_ATU_CR1) / in designware_pcie_root_config_read()
225 DesignwarePCIEViewport *viewport = opaque; in designware_pcie_root_data_access() local
226 DesignwarePCIERoot *root = viewport->root; in designware_pcie_root_data_access()
228 const uint8_t busnum = DESIGNWARE_PCIE_ATU_BUS(viewport->target); in designware_pcie_root_data_access()
229 const uint8_t devfn = DESIGNWARE_PCIE_ATU_DEVFN(viewport->target); in designware_pcie_root_data_access()
273 DesignwarePCIEViewport *viewport) in designware_pcie_update_viewport() argument
275 const uint64_t target = viewport->target; in designware_pcie_update_viewport()
276 const uint64_t base = viewport->base; in designware_pcie_update_viewport()
277 const uint64_t size = (uint64_t)viewport->limit - base + 1; in designware_pcie_update_viewport()
278 const bool enabled = viewport->cr[1] & DESIGNWARE_PCIE_ATU_ENABLE; in designware_pcie_update_viewport()
282 if (viewport->cr[0] == DESIGNWARE_PCIE_ATU_TYPE_MEM) { in designware_pcie_update_viewport()
283 current = &viewport->mem; in designware_pcie_update_viewport()
284 other = &viewport->cfg; in designware_pcie_update_viewport()
287 current = &viewport->cfg; in designware_pcie_update_viewport()
288 other = &viewport->mem; in designware_pcie_update_viewport()
292 * An outbound viewport can be reconfigure from being MEM to CFG, in designware_pcie_update_viewport()
309 DesignwarePCIEViewport *viewport = in designware_pcie_root_config_write() local
351 viewport->base = deposit64(viewport->base, in designware_pcie_root_config_write()
358 viewport->target = deposit64(viewport->target, in designware_pcie_root_config_write()
364 viewport->limit = val; in designware_pcie_root_config_write()
368 viewport->cr[0] = val; in designware_pcie_root_config_write()
371 viewport->cr[1] = val; in designware_pcie_root_config_write()
372 designware_pcie_update_viewport(root, viewport); in designware_pcie_root_config_write()
385 return g_strdup_printf("PCI %s Viewport %u [%s]", in designware_pcie_viewport_name()
396 DesignwarePCIEViewport *viewport; in designware_pcie_root_realize() local
399 * that belong to a given viewport in designware_pcie_root_realize()
426 viewport = &root->viewports[DESIGNWARE_PCIE_VIEWPORT_INBOUND][i]; in designware_pcie_root_realize()
427 viewport->inbound = true; in designware_pcie_root_realize()
428 viewport->base = 0x0000000000000000ULL; in designware_pcie_root_realize()
429 viewport->target = 0x0000000000000000ULL; in designware_pcie_root_realize()
430 viewport->limit = UINT32_MAX; in designware_pcie_root_realize()
431 viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM; in designware_pcie_root_realize()
441 mem = &viewport->mem; in designware_pcie_root_realize()
449 viewport = &root->viewports[DESIGNWARE_PCIE_VIEWPORT_OUTBOUND][i]; in designware_pcie_root_realize()
450 viewport->root = root; in designware_pcie_root_realize()
451 viewport->inbound = false; in designware_pcie_root_realize()
452 viewport->base = 0x0000000000000000ULL; in designware_pcie_root_realize()
453 viewport->target = 0x0000000000000000ULL; in designware_pcie_root_realize()
454 viewport->limit = UINT32_MAX; in designware_pcie_root_realize()
455 viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM; in designware_pcie_root_realize()
465 mem = &viewport->mem; in designware_pcie_root_realize()
477 mem = &viewport->cfg; in designware_pcie_root_realize()
479 memory_region_init_io(&viewport->cfg, OBJECT(root), in designware_pcie_root_realize()
481 viewport, name, dummy_size); in designware_pcie_root_realize()
496 viewport = &root->viewports[DESIGNWARE_PCIE_VIEWPORT_INBOUND][0]; in designware_pcie_root_realize()
497 viewport->cr[1] = DESIGNWARE_PCIE_ATU_ENABLE; in designware_pcie_root_realize()
498 designware_pcie_update_viewport(root, viewport); in designware_pcie_root_realize()
555 .name = "designware-pcie-viewport",