Lines Matching +full:conf +full:- +full:tx
12 #include "hw/qdev-properties.h"
82 NICConf conf; member
106 if (s->next_packet >= ARRAY_SIZE(s->rx)) { in stellaris_enet_post_load()
107 return -1; in stellaris_enet_post_load()
110 if (s->np > ARRAY_SIZE(s->rx)) { in stellaris_enet_post_load()
111 return -1; in stellaris_enet_post_load()
114 for (i = 0; i < ARRAY_SIZE(s->rx); i++) { in stellaris_enet_post_load()
115 if (s->rx[i].len > ARRAY_SIZE(s->rx[i].data)) { in stellaris_enet_post_load()
116 return -1; in stellaris_enet_post_load()
120 if (s->rx_fifo_offset > ARRAY_SIZE(s->rx[0].data) - 4) { in stellaris_enet_post_load()
121 return -1; in stellaris_enet_post_load()
124 if (s->tx_fifo_len > ARRAY_SIZE(s->tx_fifo)) { in stellaris_enet_post_load()
125 return -1; in stellaris_enet_post_load()
159 qemu_set_irq(s->irq, (s->ris & s->im) != 0); in stellaris_enet_update()
163 * in the TX fifo.
167 return s->tx_fifo[0] | (s->tx_fifo[1] << 8); in stellaris_txpacket_datalen()
170 /* Return true if the packet currently in the TX FIFO is complete,
178 if (!(s->tctl & SE_TCTL_CRC)) { in stellaris_txpacket_complete()
181 /* Cover the corner case of a 2032 byte payload with auto-CRC disabled: in stellaris_txpacket_complete()
183 * clear how the h/w handles this, but if using threshold-based TX in stellaris_txpacket_complete()
186 framelen = MIN(framelen, ARRAY_SIZE(s->tx_fifo)); in stellaris_txpacket_complete()
187 return s->tx_fifo_len >= framelen; in stellaris_txpacket_complete()
190 /* Return true if the TX FIFO threshold is enabled and the FIFO
195 return (s->thr < 0x3f && in stellaris_tx_thr_reached()
196 (s->tx_fifo_len >= 4 * (s->thr * 8 + 1))); in stellaris_tx_thr_reached()
199 /* Send the packet currently in the TX FIFO */
209 if ((s->tctl & SE_TCTL_PADEN) && framelen < 60) { in stellaris_enet_send()
210 memset(&s->tx_fifo[framelen + 2], 0, 60 - framelen); in stellaris_enet_send()
216 * will have caught this. Silently write a corrupt half-packet, in stellaris_enet_send()
219 framelen = MIN(framelen, ARRAY_SIZE(s->tx_fifo) - 2); in stellaris_enet_send()
220 qemu_send_packet(qemu_get_queue(s->nic), s->tx_fifo + 2, framelen); in stellaris_enet_send()
221 s->tx_fifo_len = 0; in stellaris_enet_send()
222 s->ris |= SE_INT_TXEMP; in stellaris_enet_send()
224 DPRINTF("Done TX\n"); in stellaris_enet_send()
235 if ((s->rctl & SE_RCTL_RXEN) == 0) in stellaris_enet_receive()
236 return -1; in stellaris_enet_receive()
237 if (s->np >= 31) { in stellaris_enet_receive()
242 n = s->next_packet + s->np; in stellaris_enet_receive()
244 n -= 31; in stellaris_enet_receive()
246 if (size >= sizeof(s->rx[n].data) - 6) { in stellaris_enet_receive()
251 s->ris |= SE_INT_FOV; in stellaris_enet_receive()
253 return -1; in stellaris_enet_receive()
256 s->np++; in stellaris_enet_receive()
257 s->rx[n].len = size + 6; in stellaris_enet_receive()
258 p = s->rx[n].data; in stellaris_enet_receive()
270 memset(p, 0, (6 - size) & 3); in stellaris_enet_receive()
273 s->ris |= SE_INT_RX; in stellaris_enet_receive()
281 return (s->np < 31); in stellaris_enet_can_receive()
292 DPRINTF("IRQ status %02x\n", s->ris); in stellaris_enet_read()
293 return s->ris; in stellaris_enet_read()
295 return s->im; in stellaris_enet_read()
297 return s->rctl; in stellaris_enet_read()
299 return s->tctl; in stellaris_enet_read()
304 if (s->np == 0) { in stellaris_enet_read()
309 rx_fifo = s->rx[s->next_packet].data + s->rx_fifo_offset; in stellaris_enet_read()
313 s->rx_fifo_offset += 4; in stellaris_enet_read()
314 if (s->rx_fifo_offset >= s->rx[s->next_packet].len) { in stellaris_enet_read()
315 s->rx_fifo_offset = 0; in stellaris_enet_read()
316 s->next_packet++; in stellaris_enet_read()
317 if (s->next_packet >= 31) in stellaris_enet_read()
318 s->next_packet = 0; in stellaris_enet_read()
319 s->np--; in stellaris_enet_read()
320 DPRINTF("RX done np=%d\n", s->np); in stellaris_enet_read()
321 if (!s->np && stellaris_enet_can_receive(s)) { in stellaris_enet_read()
322 qemu_flush_queued_packets(qemu_get_queue(s->nic)); in stellaris_enet_read()
328 return s->conf.macaddr.a[0] | (s->conf.macaddr.a[1] << 8) in stellaris_enet_read()
329 | (s->conf.macaddr.a[2] << 16) in stellaris_enet_read()
330 | ((uint32_t)s->conf.macaddr.a[3] << 24); in stellaris_enet_read()
332 return s->conf.macaddr.a[4] | (s->conf.macaddr.a[5] << 8); in stellaris_enet_read()
334 return s->thr; in stellaris_enet_read()
336 return s->mctl; in stellaris_enet_read()
338 return s->mdv; in stellaris_enet_read()
342 return s->mtxd; in stellaris_enet_read()
344 return s->mrxd; in stellaris_enet_read()
346 return s->np; in stellaris_enet_read()
366 s->ris &= ~value; in stellaris_enet_write()
367 DPRINTF("IRQ ack %02" PRIx64 "/%02x\n", value, s->ris); in stellaris_enet_write()
369 /* Clearing TXER also resets the TX fifo. */ in stellaris_enet_write()
371 s->tx_fifo_len = 0; in stellaris_enet_write()
375 DPRINTF("IRQ mask %02" PRIx64 "/%02x\n", value, s->ris); in stellaris_enet_write()
376 s->im = value; in stellaris_enet_write()
380 s->rctl = value; in stellaris_enet_write()
382 s->np = 0; in stellaris_enet_write()
383 s->rx_fifo_offset = 0; in stellaris_enet_write()
388 s->tctl = value; in stellaris_enet_write()
391 if (s->tx_fifo_len == 0) { in stellaris_enet_write()
395 DPRINTF("TX frame too long (%d)\n", framelen); in stellaris_enet_write()
396 s->ris |= SE_INT_TXER; in stellaris_enet_write()
402 if (s->tx_fifo_len + 4 <= ARRAY_SIZE(s->tx_fifo)) { in stellaris_enet_write()
403 s->tx_fifo[s->tx_fifo_len++] = value; in stellaris_enet_write()
404 s->tx_fifo[s->tx_fifo_len++] = value >> 8; in stellaris_enet_write()
405 s->tx_fifo[s->tx_fifo_len++] = value >> 16; in stellaris_enet_write()
406 s->tx_fifo[s->tx_fifo_len++] = value >> 24; in stellaris_enet_write()
414 s->conf.macaddr.a[0] = value; in stellaris_enet_write()
415 s->conf.macaddr.a[1] = value >> 8; in stellaris_enet_write()
416 s->conf.macaddr.a[2] = value >> 16; in stellaris_enet_write()
417 s->conf.macaddr.a[3] = value >> 24; in stellaris_enet_write()
420 s->conf.macaddr.a[4] = value; in stellaris_enet_write()
421 s->conf.macaddr.a[5] = value >> 8; in stellaris_enet_write()
424 s->thr = value; in stellaris_enet_write()
430 s->mctl = value & ~1; in stellaris_enet_write()
433 s->mdv = value; in stellaris_enet_write()
439 s->mtxd = value & 0xff; in stellaris_enet_write()
469 s->mdv = 0x80; in stellaris_enet_reset()
470 s->rctl = SE_RCTL_BADCRC; in stellaris_enet_reset()
471 s->im = SE_INT_PHY | SE_INT_MD | SE_INT_RXER | SE_INT_FOV | SE_INT_TXEMP in stellaris_enet_reset()
473 s->thr = 0x3f; in stellaris_enet_reset()
474 s->tx_fifo_len = 0; in stellaris_enet_reset()
488 memory_region_init_io(&s->mmio, OBJECT(s), &stellaris_enet_ops, s, in stellaris_enet_realize()
490 sysbus_init_mmio(sbd, &s->mmio); in stellaris_enet_realize()
491 sysbus_init_irq(sbd, &s->irq); in stellaris_enet_realize()
492 qemu_macaddr_default_if_unset(&s->conf.macaddr); in stellaris_enet_realize()
494 s->nic = qemu_new_nic(&net_stellaris_enet_info, &s->conf, in stellaris_enet_realize()
495 object_get_typename(OBJECT(dev)), dev->id, in stellaris_enet_realize()
496 &dev->mem_reentrancy_guard, s); in stellaris_enet_realize()
497 qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); in stellaris_enet_realize()
501 DEFINE_NIC_PROPERTIES(stellaris_enet_state, conf),
509 dc->realize = stellaris_enet_realize; in stellaris_enet_class_init()
512 dc->vmsd = &vmstate_stellaris_enet; in stellaris_enet_class_init()