hw/net/rtl8139.c

432 struct RTL8139State {  struct
434     PCIDevice parent_obj;
437     uint8_t phys[8]; /* mac address */
438     uint8_t mult[8]; /* multicast mask array */
440     uint32_t TxStatus[4]; /* TxStatus0 in C mode*/ /* also DTCCR[0] and DTCCR[1] in C+ mode */
441     uint32_t TxAddr[4];   /* TxAddr0 */
442     uint32_t RxBuf;       /* Receive buffer */
443     uint32_t RxBufferSize;/* internal variable, receive ring buffer size in C mode */
444     uint32_t RxBufPtr;
445     uint32_t RxBufAddr;
447     uint16_t IntrStatus;
448     uint16_t IntrMask;
450     uint32_t TxConfig;
451     uint32_t RxConfig;
452     uint32_t RxMissed;
454     uint16_t CSCR;
456     uint8_t  Cfg9346;
457     uint8_t  Config0;
458     uint8_t  Config1;
459     uint8_t  Config3;
460     uint8_t  Config4;
461     uint8_t  Config5;
463     uint8_t  clock_enabled;
464     uint8_t  bChipCmdState;
466     uint16_t MultiIntr;
468     uint16_t BasicModeCtrl;
469     uint16_t BasicModeStatus;
470     uint16_t NWayAdvert;
471     uint16_t NWayLPAR;
472     uint16_t NWayExpansion;
474     uint16_t CpCmd;
475     uint8_t  TxThresh;
477     NICState *nic;
478     NICConf conf;
481     uint32_t   currTxDesc;
484     uint32_t   cplus_enabled;
486     uint32_t   currCPlusRxDesc;
487     uint32_t   currCPlusTxDesc;
489     uint32_t   RxRingAddrLO;
490     uint32_t   RxRingAddrHI;
492     EEprom9346 eeprom;
517 static void RTL8139TallyCounters_dma_write(RTL8139State *s, dma_addr_t tc_addr);  argument