hw/net/opencores_eth.c

275 OBJECT_DECLARE_SIMPLE_TYPE(OpenEthState, OPEN_ETH)
277 struct OpenEthState {  struct
293 static desc *rx_desc(OpenEthState *s)  in rx_desc()  argument
298 static desc *tx_desc(OpenEthState *s)  in tx_desc()
303 static void open_eth_update_irq(OpenEthState *s,  in open_eth_update_irq()
312 static void open_eth_int_source_write(OpenEthState *s,  in open_eth_int_source_write()
324     OpenEthState *s = qemu_get_nic_opaque(nc);  in open_eth_set_link_status()
334     OpenEthState *s = opaque;  in open_eth_reset()
355     OpenEthState *s = qemu_get_nic_opaque(nc);  in open_eth_can_receive()
363     OpenEthState *s = qemu_get_nic_opaque(nc);
485 static void open_eth_start_xmit(OpenEthState *s, desc *tx)
536 static void open_eth_check_start_xmit(OpenEthState *s)
549     static uint32_t (*reg_read[REG_MAX])(OpenEthState *s) = {
551     OpenEthState *s = opaque;
566 static void open_eth_notify_can_receive(OpenEthState *s)
575 static void open_eth_ro(OpenEthState *s, uint32_t val)
579 static void open_eth_moder_host_write(OpenEthState *s, uint32_t val)
599 static void open_eth_int_source_host_write(OpenEthState *s, uint32_t val)
608 static void open_eth_int_mask_host_write(OpenEthState *s, uint32_t val)
617 static void open_eth_tx_bd_num_host_write(OpenEthState *s, uint32_t val)
629 static void open_eth_mii_command_host_write(OpenEthState *s, uint32_t val)
651 static void open_eth_mii_tx_host_write(OpenEthState *s, uint32_t val)
663     static void (*reg_write[REG_MAX])(OpenEthState *s, uint32_t val) = {
672     OpenEthState *s = opaque;
688     OpenEthState *s = opaque;
700     OpenEthState *s = opaque;
722     OpenEthState *s = OPEN_ETH(dev);
741     OpenEthState *d = OPEN_ETH(dev);
747     DEFINE_NIC_PROPERTIES(OpenEthState, conf),
765     .instance_size = sizeof(OpenEthState),