Lines Matching +full:- +full:- +full:disable +full:- +full:rbd
16 #include "hw/qdev-properties.h"
18 #include "exec/address-spaces.h"
32 #define BITS(n, m) (((0xffffffffU << (31 - n)) >> (31 - n + m)) << m)
77 #define I596_PREFETCH (s->config[0] & 0x80)
78 #define I596_PROMISC (s->config[8] & 0x01)
79 #define I596_BC_DISABLE (s->config[8] & 0x02) /* broadcast disable */
80 #define I596_NOCRC_INS (s->config[8] & 0x08)
81 #define I596_CRCINM (s->config[11] & 0x04) /* CRC appended */
82 #define I596_MC_ALL (s->config[11] & 0x20)
83 #define I596_MULTIIA (s->config[13] & 0x40)
129 MAC_ARG(hdr->ether_dhost), MAC_ARG(hdr->ether_shost), \
130 be16_to_cpu(hdr->ether_type)); \
148 if (s->nic && len) { in i82596_transmit()
149 assert(len <= sizeof(s->tx_buffer)); in i82596_transmit()
151 MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len); in i82596_transmit()
152 DBG(PRINT_PKTHDR("Send", &s->tx_buffer)); in i82596_transmit()
154 qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len); in i82596_transmit()
172 nc = qemu_get_queue(s->nic); in set_individual_address()
173 m = s->conf.macaddr.a; in set_individual_address()
177 trace_i82596_new_mac(nc->info_str); in set_individual_address()
184 memset(&s->mult[0], 0, sizeof(s->mult)); in set_multicast_list()
198 assert(mcast_idx < 8 * sizeof(s->mult)); in set_multicast_list()
199 s->mult[mcast_idx >> 3] |= (1 << (mcast_idx & 7)); in set_multicast_list()
208 d->lnkst = nc->link_down ? 0 : 0x8000; in i82596_set_link_status()
213 s->scb_status = (s->scb_status & 0xf000) in update_scb_status()
214 | (s->cu_status << 8) | (s->rx_status << 4); in update_scb_status()
215 set_uint16(s->scb, s->scb_status); in update_scb_status()
222 s->scp = 0; in i82596_s_reset()
223 s->scb_status = 0; in i82596_s_reset()
224 s->cu_status = CU_IDLE; in i82596_s_reset()
225 s->rx_status = RX_SUSPENDED; in i82596_s_reset()
226 s->cmd_p = I596_NULL; in i82596_s_reset()
227 s->lnkst = 0x8000; /* initial link state: up */ in i82596_s_reset()
228 s->ca = s->ca_active = 0; in i82596_s_reset()
229 s->send_irq = 0; in i82596_s_reset()
239 DBG(printf("STARTING COMMAND LOOP cmd_p=%08x\n", s->cmd_p)); in command_loop()
241 while (s->cmd_p != I596_NULL) { in command_loop()
244 set_uint16(s->cmd_p, status); in command_loop()
247 cmd = get_uint16(s->cmd_p + 2); in command_loop()
248 DBG(printf("Running command %04x at %08x\n", cmd, s->cmd_p)); in command_loop()
254 set_individual_address(s, s->cmd_p); in command_loop()
257 byte_cnt = get_byte(s->cmd_p + 8) & 0x0f; in command_loop()
259 byte_cnt = MIN(byte_cnt, sizeof(s->config)); in command_loop()
261 address_space_read(&address_space_memory, s->cmd_p + 8, in command_loop()
262 MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt); in command_loop()
264 s->config[2] &= 0x82; /* mask valid bits */ in command_loop()
265 s->config[2] |= 0x40; in command_loop()
266 s->config[7] &= 0xf7; /* clear zero bit */ in command_loop()
268 s->config[10] = MAX(s->config[10], 5); /* min frame length */ in command_loop()
269 s->config[12] &= 0x40; /* only full duplex field valid */ in command_loop()
270 s->config[13] |= 0x3f; /* set ones in byte 13 */ in command_loop()
274 set_uint32(s->cmd_p + 8, s->lnkst); in command_loop()
277 i82596_transmit(s, s->cmd_p); in command_loop()
280 set_multicast_list(s, s->cmd_p); in command_loop()
289 set_uint16(s->cmd_p, status); in command_loop()
291 s->cmd_p = get_uint32(s->cmd_p + 4); /* get link address */ in command_loop()
292 DBG(printf("NEXT addr would be %08x\n", s->cmd_p)); in command_loop()
293 if (s->cmd_p == 0) { in command_loop()
294 s->cmd_p = I596_NULL; in command_loop()
299 s->cmd_p = I596_NULL; in command_loop()
303 s->cu_status = CU_SUSPENDED; in command_loop()
308 s->scb_status |= SCB_STATUS_CX; in command_loop()
310 s->scb_status &= ~SCB_STATUS_CX; in command_loop()
316 s->send_irq = 1; in command_loop()
319 if (s->cu_status != CU_ACTIVE) { in command_loop()
324 qemu_flush_queued_packets(qemu_get_queue(s->nic)); in command_loop()
331 timer_del(s->flush_queue_timer); in i82596_flush_queue_timer()
332 qemu_flush_queued_packets(qemu_get_queue(s->nic)); in i82596_flush_queue_timer()
333 timer_mod(s->flush_queue_timer, in i82596_flush_queue_timer()
343 command = get_uint16(s->scb + 2); in examine_scb()
348 set_uint16(s->scb + 2, 0); in examine_scb()
350 s->scb_status &= ~(command & SCB_COMMAND_ACK_MASK); in examine_scb()
356 s->cu_status = CU_ACTIVE; in examine_scb()
359 s->cu_status = CU_SUSPENDED; in examine_scb()
360 s->scb_status |= SCB_STATUS_CNA; /* CU left active state */ in examine_scb()
371 s->rx_status = RX_IDLE; in examine_scb()
373 timer_mod(s->flush_queue_timer, qemu_clock_get_ms( in examine_scb()
379 s->rx_status = RX_SUSPENDED; in examine_scb()
380 s->scb_status |= SCB_STATUS_RNR; /* RU left active state */ in examine_scb()
391 if (s->cu_status != CU_SUSPENDED) { in examine_scb()
392 if (s->cmd_p == I596_NULL) { in examine_scb()
393 s->cmd_p = get_uint32(s->scb + 4); in examine_scb()
408 if (s->scp) { in signal_ca()
409 /* CA after reset -> do init with new scp. */ in signal_ca()
410 s->sysbus = get_byte(s->scp + 3); /* big endian */ in signal_ca()
411 DBG(printf("SYSBUS = %08x\n", s->sysbus)); in signal_ca()
412 if (((s->sysbus >> 1) & 0x03) != 2) { in signal_ca()
415 if ((s->sysbus >> 7)) { in signal_ca()
416 printf("WARNING: 32BIT LINMODE IN B-STEPPING NOT SUPPORTED !!\n"); in signal_ca()
418 iscp = get_uint32(s->scp + 8); in signal_ca()
419 s->scb = get_uint32(iscp + 4); in signal_ca()
421 s->scp = 0; in signal_ca()
424 s->ca++; /* count ca() */ in signal_ca()
425 if (!s->ca_active) { in signal_ca()
426 s->ca_active = 1; in signal_ca()
427 while (s->ca) { in signal_ca()
429 s->ca--; in signal_ca()
431 s->ca_active = 0; in signal_ca()
434 if (s->send_irq) { in signal_ca()
435 s->send_irq = 0; in signal_ca()
436 qemu_set_irq(s->irq, 1); in signal_ca()
449 s->scp = val; in i82596_ioport_writew()
459 return -1; in i82596_ioport_readw()
473 if (s->rx_status == RX_SUSPENDED) { in i82596_can_receive()
477 if (!s->lnkst) { in i82596_can_receive()
481 if (USE_TIMER && !timer_pending(s->flush_queue_timer)) { in i82596_can_receive()
492 uint32_t rbd; in i82596_receive() local
503 if (USE_TIMER && timer_pending(s->flush_queue_timer)) { in i82596_receive()
508 if (s->rx_status == RX_SUSPENDED) { in i82596_receive()
510 return -1; in i82596_receive()
513 if (!s->lnkst) { in i82596_receive()
515 return -1; in i82596_receive()
519 if (sz < s->config[10]) { in i82596_receive()
521 sz, s->config[10]); in i82596_receive()
522 return -1; in i82596_receive()
555 assert(mcast_idx < 8 * sizeof(s->mult)); in i82596_receive()
557 if (!(s->mult[mcast_idx >> 3] & (1 << (mcast_idx & 7)))) { in i82596_receive()
566 } else if (!memcmp(s->conf.macaddr.a, buf, 6)) { in i82596_receive()
585 rfd_p = get_uint32(s->scb + 8); /* get Receive Frame Descriptor */ in i82596_receive()
589 rbd = get_uint32(rfd_p + 8); in i82596_receive()
590 assert(rbd && rbd != I596_NULL); in i82596_receive()
602 rbd = get_uint32(rfd_p + 8); in i82596_receive()
612 /* printf("Receive: rbd is %08x\n", rbd); */ in i82596_receive()
613 buffer_size = get_uint16(rbd + 12); in i82596_receive()
621 rba = get_uint32(rbd + 8); in i82596_receive()
627 if ((len - num) >= 4) { in i82596_receive()
632 bufcount = len - 4; in i82596_receive()
634 crccount = num - bufcount; in i82596_receive()
639 bufsz -= bufcount; in i82596_receive()
644 len -= bufcount; in i82596_receive()
653 len -= crccount; in i82596_receive()
660 set_uint16(rbd + 0, num); /* write actual count with flags */ in i82596_receive()
662 /* get next rbd */ in i82596_receive()
663 rbd = get_uint32(rbd + 4); in i82596_receive()
664 /* printf("Next Receive: rbd is %08x\n", rbd); */ in i82596_receive()
672 set_uint32(next_rfd + 8, rbd); in i82596_receive()
678 s->rx_status = RX_SUSPENDED; in i82596_receive()
679 s->scb_status |= SCB_STATUS_RNR; /* RU left active state */ in i82596_receive()
690 s->scb_status |= SCB_STATUS_FR; /* set "RU finished receiving frame" bit. */ in i82596_receive()
694 qemu_set_irq(s->irq, 1); in i82596_receive()
695 /* s->send_irq = 1; */ in i82596_receive()
699 rfd_p = get_uint32(s->scb + 8); /* get Receive Frame Descriptor */ in i82596_receive()
704 rbd = get_uint32(rfd_p + 8); in i82596_receive()
705 DBG(printf("Next Receive: rbd is %08x\n", rbd)); in i82596_receive()
725 if (s->conf.macaddr.a[0] == 0) { in i82596_common_init()
726 qemu_macaddr_default_if_unset(&s->conf.macaddr); in i82596_common_init()
728 s->nic = qemu_new_nic(info, &s->conf, object_get_typename(OBJECT(dev)), in i82596_common_init()
729 dev->id, &dev->mem_reentrancy_guard, s); in i82596_common_init()
730 qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); in i82596_common_init()
733 s->flush_queue_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, in i82596_common_init()
736 s->lnkst = 0x8000; /* initial link state: up */ in i82596_common_init()