66         frame->can_dlc = can_dlc2len(frame_form_w.s.dlc);  in ctucan_buff2frame()
71         ide = frame_form_w.s.ide;  in ctucan_buff2frame()
73             frame->can_id = (identifier_w.s.identifier_base << 18) |  in ctucan_buff2frame()
74                             identifier_w.s.identifier_ext;  in ctucan_buff2frame()
77             frame->can_id = identifier_w.s.identifier_base;  in ctucan_buff2frame()
80         if (frame_form_w.s.esi_rsv) {  in ctucan_buff2frame()
84         if (frame_form_w.s.rtr) {  in ctucan_buff2frame()
88         if (frame_form_w.s.fdf) {   /*CAN FD*/  in ctucan_buff2frame()
90             if (frame_form_w.s.brs) {  in ctucan_buff2frame()
118         frame_form_w.s.rwcnt = (bytes_cnt >> 2) - 1;  in ctucan_frame2buff()
120         frame_form_w.s.dlc = can_len2dlc(frame->can_dlc);  in ctucan_frame2buff()
123             frame_form_w.s.ide = 1;  in ctucan_frame2buff()
124             identifier_w.s.identifier_base =  in ctucan_frame2buff()
126             identifier_w.s.identifier_ext = frame->can_id & 0x3FFFF;  in ctucan_frame2buff()
128             identifier_w.s.identifier_base = frame->can_id & 0x7FF;  in ctucan_frame2buff()
132             frame_form_w.s.esi_rsv = 1;  in ctucan_frame2buff()
136             frame_form_w.s.rtr = 1;  in ctucan_frame2buff()
140            frame_form_w.s.fdf = 1;  in ctucan_frame2buff()
142                 frame_form_w.s.brs = 1;  in ctucan_frame2buff()
154 static void ctucan_update_irq(CtuCanCoreState *s)  in ctucan_update_irq()  argument
160     if (s->rx_status_rx_settings.s.rxfrc) {  in ctucan_update_irq()
161         int_rq.s.rbnei = 1;  in ctucan_update_irq()
164     int_rq.u32 &= ~s->int_mask.u32;  in ctucan_update_irq()
165     s->int_stat.u32 |= int_rq.u32;  in ctucan_update_irq()
166     if (s->int_stat.u32 & s->int_ena.u32) {  in ctucan_update_irq()
167         qemu_irq_raise(s->irq);  in ctucan_update_irq()
169         qemu_irq_lower(s->irq);  in ctucan_update_irq()
173 static void ctucan_update_txnf(CtuCanCoreState *s)  in ctucan_update_txnf()  argument
182         buff_st = (s->tx_status.u32 >> (i * 4)) & 0xf;  in ctucan_update_txnf()
187     s->status.s.txnf = txnf;  in ctucan_update_txnf()
190 void ctucan_hardware_reset(CtuCanCoreState *s)  in ctucan_hardware_reset()  argument
197     s->tx_status.u32 = 0;  in ctucan_hardware_reset()
201         s->tx_status.u32 = (s->tx_status.u32 & ~buff_st_mask) |  in ctucan_hardware_reset()
204     s->status.s.idle = 1;  in ctucan_hardware_reset()
206     ctucan_update_txnf(s);  in ctucan_hardware_reset()
208     s->rx_status_rx_settings.u32 = 0;  in ctucan_hardware_reset()
209     s->rx_tail_pos = 0;  in ctucan_hardware_reset()
210     s->rx_cnt = 0;  in ctucan_hardware_reset()
211     s->rx_frame_rem = 0;  in ctucan_hardware_reset()
214     s->rx_tail_pos = 0;  in ctucan_hardware_reset()
215     s->rx_cnt = 0;  in ctucan_hardware_reset()
216     s->rx_frame_rem = 0;  in ctucan_hardware_reset()
219     s->mode_settings.u32 = 0;  in ctucan_hardware_reset()
220     s->mode_settings.s.fde = 1;  in ctucan_hardware_reset()
222     s->int_stat.u32 = 0;  in ctucan_hardware_reset()
223     s->int_ena.u32 = 0;  in ctucan_hardware_reset()
224     s->int_mask.u32 = 0;  in ctucan_hardware_reset()
226     s->rx_status_rx_settings.u32 = 0;  in ctucan_hardware_reset()
227     s->rx_status_rx_settings.s.rxe = 0;  in ctucan_hardware_reset()
229     s->rx_fr_ctr.u32 = 0;  in ctucan_hardware_reset()
230     s->tx_fr_ctr.u32 = 0;  in ctucan_hardware_reset()
232     s->yolo_reg.s.yolo_val = 3735928559;  in ctucan_hardware_reset()
234     qemu_irq_lower(s->irq);  in ctucan_hardware_reset()
237 static void ctucan_send_ready_buffers(CtuCanCoreState *s)  in ctucan_send_ready_buffers()  argument
244     if (!s->mode_settings.s.ena) {  in ctucan_send_ready_buffers()
257             if (extract32(s->tx_status.u32, i * 4, 4) != TXT_RDY) {  in ctucan_send_ready_buffers()
260             prio = (s->tx_priority.u32 >> (i * 4)) & 0x7;  in ctucan_send_ready_buffers()
270         pf = s->tx_buffer[buff2tx_idx].data;  in ctucan_send_ready_buffers()
272         s->status.s.idle = 0;  in ctucan_send_ready_buffers()
273         s->status.s.txs = 1;  in ctucan_send_ready_buffers()
274         can_bus_client_send(&s->bus_client, &frame, 1);  in ctucan_send_ready_buffers()
275         s->status.s.idle = 1;  in ctucan_send_ready_buffers()
276         s->status.s.txs = 0;  in ctucan_send_ready_buffers()
277         s->tx_fr_ctr.s.tx_fr_ctr_val++;  in ctucan_send_ready_buffers()
278         int_stat.s.txi = 1;  in ctucan_send_ready_buffers()
279         int_stat.s.txbhci = 1;  in ctucan_send_ready_buffers()
280         s->int_stat.u32 |= int_stat.u32 & ~s->int_mask.u32;  in ctucan_send_ready_buffers()
281         s->tx_status.u32 = deposit32(s->tx_status.u32,  in ctucan_send_ready_buffers()
289 void ctucan_mem_write(CtuCanCoreState *s, hwaddr addr, uint64_t val,  in ctucan_mem_write()  argument
307             ((addr + size) <= sizeof(s->tx_buffer[buff_num].data))) {  in ctucan_mem_write()
308             stn_le_p(s->tx_buffer[buff_num].data + addr, size, val);  in ctucan_mem_write()
313             s->mode_settings.u32 = (uint32_t)val;  in ctucan_mem_write()
314             if (s->mode_settings.s.rst) {  in ctucan_mem_write()
315                 ctucan_hardware_reset(s);  in ctucan_mem_write()
316                 s->mode_settings.s.rst = 0;  in ctucan_mem_write()
323             if (command.s.cdo) {  in ctucan_mem_write()
324                 s->status.s.dor = 0;  in ctucan_mem_write()
326             if (command.s.rrb) {  in ctucan_mem_write()
327                 s->rx_tail_pos = 0;  in ctucan_mem_write()
328                 s->rx_cnt = 0;  in ctucan_mem_write()
329                 s->rx_frame_rem = 0;  in ctucan_mem_write()
330                 s->rx_status_rx_settings.s.rxfrc = 0;  in ctucan_mem_write()
332             if (command.s.txfcrst) {  in ctucan_mem_write()
333                 s->tx_fr_ctr.s.tx_fr_ctr_val = 0;  in ctucan_mem_write()
335             if (command.s.rxfcrst) {  in ctucan_mem_write()
336                 s->rx_fr_ctr.s.rx_fr_ctr_val = 0;  in ctucan_mem_write()
341             s->int_stat.u32 &= ~(uint32_t)val;  in ctucan_mem_write()
344             s->int_ena.u32 |= (uint32_t)val;  in ctucan_mem_write()
347             s->int_ena.u32 &= ~(uint32_t)val;  in ctucan_mem_write()
350             s->int_mask.u32 |= (uint32_t)val;  in ctucan_mem_write()
353             s->int_mask.u32 &= ~(uint32_t)val;  in ctucan_mem_write()
356             if (s->mode_settings.s.ena) {  in ctucan_mem_write()
364                 mask.s.txb1 = 1;  in ctucan_mem_write()
371                     buff_st = (s->tx_status.u32 >> (i * 4)) & 0xf;  in ctucan_mem_write()
372                     if (tx_command.s.txca) {  in ctucan_mem_write()
377                     if (tx_command.s.txcr) {  in ctucan_mem_write()
382                     if (tx_command.s.txce) {  in ctucan_mem_write()
387                     s->tx_status.u32 = (s->tx_status.u32 & ~buff_st_mask) |  in ctucan_mem_write()
391                 ctucan_send_ready_buffers(s);  in ctucan_mem_write()
392                 ctucan_update_txnf(s);  in ctucan_mem_write()
396             s->tx_priority.u32 = (uint32_t)val;  in ctucan_mem_write()
400         ctucan_update_irq(s);  in ctucan_mem_write()
406 uint64_t ctucan_mem_read(CtuCanCoreState *s, hwaddr addr, unsigned size)  in ctucan_mem_read()  argument
421             idver.s.device_id = CTU_CAN_FD_ID;  in ctucan_mem_read()
422             idver.s.ver_major = 2;  in ctucan_mem_read()
423             idver.s.ver_minor = 2;  in ctucan_mem_read()
428         val = s->mode_settings.u32;  in ctucan_mem_read()
431         val = s->status.u32;  in ctucan_mem_read()
434         val = s->int_stat.u32;  in ctucan_mem_read()
438         val = s->int_ena.u32;  in ctucan_mem_read()
442         val = s->int_mask.u32;  in ctucan_mem_read()
445         s->rx_mem_info.u32 = 0;  in ctucan_mem_read()
446         s->rx_mem_info.s.rx_buff_size = CTUCAN_RCV_BUF_LEN >> 2;  in ctucan_mem_read()
447         s->rx_mem_info.s.rx_mem_free = (CTUCAN_RCV_BUF_LEN -  in ctucan_mem_read()
448                                         s->rx_cnt) >> 2;  in ctucan_mem_read()
449         val = s->rx_mem_info.u32;  in ctucan_mem_read()
453         uint32_t rx_head_pos = s->rx_tail_pos + s->rx_cnt;  in ctucan_mem_read()
455         s->rx_pointers.s.rx_wpp = rx_head_pos;  in ctucan_mem_read()
456         s->rx_pointers.s.rx_rpp = s->rx_tail_pos;  in ctucan_mem_read()
457         val = s->rx_pointers.u32;  in ctucan_mem_read()
462         if (!s->rx_status_rx_settings.s.rxfrc) {  in ctucan_mem_read()
463             s->rx_status_rx_settings.s.rxe = 1;  in ctucan_mem_read()
465             s->rx_status_rx_settings.s.rxe = 0;  in ctucan_mem_read()
467         if (((s->rx_cnt + 3) & ~3) == CTUCAN_RCV_BUF_LEN) {  in ctucan_mem_read()
468             s->rx_status_rx_settings.s.rxf = 1;  in ctucan_mem_read()
470             s->rx_status_rx_settings.s.rxf = 0;  in ctucan_mem_read()
472         val = s->rx_status_rx_settings.u32;  in ctucan_mem_read()
475         if (s->rx_cnt) {  in ctucan_mem_read()
476             memcpy(&val, s->rx_buff + s->rx_tail_pos, 4);  in ctucan_mem_read()
478             if (!s->rx_frame_rem) {  in ctucan_mem_read()
481                 s->rx_frame_rem = frame_form_w.s.rwcnt * 4 + 4;  in ctucan_mem_read()
483             s->rx_cnt -= 4;  in ctucan_mem_read()
484             s->rx_frame_rem -= 4;  in ctucan_mem_read()
485             if (!s->rx_frame_rem) {  in ctucan_mem_read()
486                 s->rx_status_rx_settings.s.rxfrc--;  in ctucan_mem_read()
487                 if (!s->rx_status_rx_settings.s.rxfrc) {  in ctucan_mem_read()
488                     s->status.s.rxne = 0;  in ctucan_mem_read()
489                     s->status.s.idle = 1;  in ctucan_mem_read()
490                     s->status.s.rxs = 0;  in ctucan_mem_read()
493             s->rx_tail_pos = (s->rx_tail_pos + 4) % CTUCAN_RCV_BUF_LEN;  in ctucan_mem_read()
499         val = s->tx_status.u32;  in ctucan_mem_read()
502         val = s->tx_priority.u32;  in ctucan_mem_read()
505         val = s->rx_fr_ctr.s.rx_fr_ctr_val;  in ctucan_mem_read()
508         val = s->tx_fr_ctr.s.tx_fr_ctr_val;  in ctucan_mem_read()
511         val = s->yolo_reg.s.yolo_val;  in ctucan_mem_read()
525     CtuCanCoreState *s = container_of(client, CtuCanCoreState, bus_client);  in ctucan_can_receive()  local
527     if (!s->mode_settings.s.ena) {  in ctucan_can_receive()
537     CtuCanCoreState *s = container_of(client, CtuCanCoreState, bus_client);  in ctucan_receive()  local
551     if (s->rx_cnt + ret > CTUCAN_RCV_BUF_LEN) { /* Data overrun. */  in ctucan_receive()
552         s->status.s.dor = 1;  in ctucan_receive()
553         int_stat.s.doi = 1;  in ctucan_receive()
554         s->int_stat.u32 |= int_stat.u32 & ~s->int_mask.u32;  in ctucan_receive()
555         ctucan_update_irq(s);  in ctucan_receive()
559     s->status.s.idle = 0;  in ctucan_receive()
560     s->status.s.rxs = 1;  in ctucan_receive()
561     int_stat.s.rxi = 1;  in ctucan_receive()
562     if (((s->rx_cnt + 3) & ~3) == CTUCAN_RCV_BUF_LEN) {  in ctucan_receive()
563         int_stat.s.rxfi = 1;  in ctucan_receive()
565     s->int_stat.u32 |= int_stat.u32 & ~s->int_mask.u32;  in ctucan_receive()
566     s->rx_fr_ctr.s.rx_fr_ctr_val++;  in ctucan_receive()
567     s->rx_status_rx_settings.s.rxfrc++;  in ctucan_receive()
569         s->rx_buff[(s->rx_tail_pos + s->rx_cnt) % CTUCAN_RCV_BUF_LEN] = rcv[i];  in ctucan_receive()
570         s->rx_cnt++;  in ctucan_receive()
572     s->status.s.rxne = 1;  in ctucan_receive()
574     ctucan_update_irq(s);  in ctucan_receive()
585 int ctucan_connect_to_bus(CtuCanCoreState *s, CanBusState *bus)  in ctucan_connect_to_bus()  argument
587     s->bus_client.info = &ctucan_bus_client_info;  in ctucan_connect_to_bus()
593     if (can_bus_insert_client(bus, &s->bus_client) < 0) {  in ctucan_connect_to_bus()
600 void ctucan_disconnect(CtuCanCoreState *s)  in ctucan_disconnect()  argument
602     can_bus_remove_client(&s->bus_client);  in ctucan_disconnect()
605 int ctucan_init(CtuCanCoreState *s, qemu_irq irq)  in ctucan_init()  argument
607     s->irq = irq;  in ctucan_init()
609     qemu_irq_lower(s->irq);  in ctucan_init()
611     ctucan_hardware_reset(s);  in ctucan_init()
628     CtuCanCoreState *s = opaque;  in ctucan_post_load()  local
629     ctucan_update_irq(s);  in ctucan_post_load()