80 static bool edu_msi_enabled(EduState *edu)  in edu_msi_enabled()  argument
82     return msi_enabled(&edu->pdev);  in edu_msi_enabled()
85 static void edu_raise_irq(EduState *edu, uint32_t val)  in edu_raise_irq()  argument
87     edu->irq_status |= val;  in edu_raise_irq()
88     if (edu->irq_status) {  in edu_raise_irq()
89         if (edu_msi_enabled(edu)) {  in edu_raise_irq()
90             msi_notify(&edu->pdev, 0);  in edu_raise_irq()
92             pci_set_irq(&edu->pdev, 1);  in edu_raise_irq()
97 static void edu_lower_irq(EduState *edu, uint32_t val)  in edu_lower_irq()  argument
99     edu->irq_status &= ~val;  in edu_lower_irq()
101     if (!edu->irq_status && !edu_msi_enabled(edu)) {  in edu_lower_irq()
102         pci_set_irq(&edu->pdev, 0);  in edu_lower_irq()
127 static dma_addr_t edu_clamp_addr(const EduState *edu, dma_addr_t addr)  in edu_clamp_addr()  argument
129     dma_addr_t res = addr & edu->dma_mask;  in edu_clamp_addr()
142     EduState *edu = opaque;  in edu_dma_timer()  local
145     if (!(edu->dma.cmd & EDU_DMA_RUN)) {  in edu_dma_timer()
149     if (EDU_DMA_DIR(edu->dma.cmd) == EDU_DMA_FROM_PCI) {  in edu_dma_timer()
150         uint64_t dst = edu->dma.dst;  in edu_dma_timer()
151         edu_check_range(dst, edu->dma.cnt, DMA_START, DMA_SIZE);  in edu_dma_timer()
153         pci_dma_read(&edu->pdev, edu_clamp_addr(edu, edu->dma.src),  in edu_dma_timer()
154                 edu->dma_buf + dst, edu->dma.cnt);  in edu_dma_timer()
156         uint64_t src = edu->dma.src;  in edu_dma_timer()
157         edu_check_range(src, edu->dma.cnt, DMA_START, DMA_SIZE);  in edu_dma_timer()
159         pci_dma_write(&edu->pdev, edu_clamp_addr(edu, edu->dma.dst),  in edu_dma_timer()
160                 edu->dma_buf + src, edu->dma.cnt);  in edu_dma_timer()
163     edu->dma.cmd &= ~EDU_DMA_RUN;  in edu_dma_timer()
164     if (edu->dma.cmd & EDU_DMA_IRQ) {  in edu_dma_timer()
169         edu_raise_irq(edu, DMA_IRQ);  in edu_dma_timer()
173 static void dma_rw(EduState *edu, bool write, dma_addr_t *val, dma_addr_t *dma,  in dma_rw()  argument
176     if (write && (edu->dma.cmd & EDU_DMA_RUN)) {  in dma_rw()
187         timer_mod(&edu->dma_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 100);  in dma_rw()
193     EduState *edu = opaque;  in edu_mmio_read()  local
209         val = edu->addr4;  in edu_mmio_read()
212         qemu_mutex_lock(&edu->thr_mutex);  in edu_mmio_read()
213         val = edu->fact;  in edu_mmio_read()
214         qemu_mutex_unlock(&edu->thr_mutex);  in edu_mmio_read()
217         val = qatomic_read(&edu->status);  in edu_mmio_read()
220         val = edu->irq_status;  in edu_mmio_read()
223         dma_rw(edu, false, &val, &edu->dma.src, false);  in edu_mmio_read()
226         dma_rw(edu, false, &val, &edu->dma.dst, false);  in edu_mmio_read()
229         dma_rw(edu, false, &val, &edu->dma.cnt, false);  in edu_mmio_read()
232         dma_rw(edu, false, &val, &edu->dma.cmd, false);  in edu_mmio_read()
242     EduState *edu = opaque;  in edu_mmio_write()  local
254         edu->addr4 = ~val;  in edu_mmio_write()
257         if (qatomic_read(&edu->status) & EDU_STATUS_COMPUTING) {  in edu_mmio_write()
263         qemu_mutex_lock(&edu->thr_mutex);  in edu_mmio_write()
264         edu->fact = val;  in edu_mmio_write()
265         qatomic_or(&edu->status, EDU_STATUS_COMPUTING);  in edu_mmio_write()
266         qemu_cond_signal(&edu->thr_cond);  in edu_mmio_write()
267         qemu_mutex_unlock(&edu->thr_mutex);  in edu_mmio_write()
271             qatomic_or(&edu->status, EDU_STATUS_IRQFACT);  in edu_mmio_write()
275             qatomic_and(&edu->status, ~EDU_STATUS_IRQFACT);  in edu_mmio_write()
279         edu_raise_irq(edu, val);  in edu_mmio_write()
282         edu_lower_irq(edu, val);  in edu_mmio_write()
285         dma_rw(edu, true, &val, &edu->dma.src, false);  in edu_mmio_write()
288         dma_rw(edu, true, &val, &edu->dma.dst, false);  in edu_mmio_write()
291         dma_rw(edu, true, &val, &edu->dma.cnt, false);  in edu_mmio_write()
297         dma_rw(edu, true, &val, &edu->dma.cmd, true);  in edu_mmio_write()
323     EduState *edu = opaque;  in edu_fact_thread()  local
328         qemu_mutex_lock(&edu->thr_mutex);  in edu_fact_thread()
329         while ((qatomic_read(&edu->status) & EDU_STATUS_COMPUTING) == 0 &&  in edu_fact_thread()
330                         !edu->stopping) {  in edu_fact_thread()
331             qemu_cond_wait(&edu->thr_cond, &edu->thr_mutex);  in edu_fact_thread()
334         if (edu->stopping) {  in edu_fact_thread()
335             qemu_mutex_unlock(&edu->thr_mutex);  in edu_fact_thread()
339         val = edu->fact;  in edu_fact_thread()
340         qemu_mutex_unlock(&edu->thr_mutex);  in edu_fact_thread()
351         qemu_mutex_lock(&edu->thr_mutex);  in edu_fact_thread()
352         edu->fact = ret;  in edu_fact_thread()
353         qemu_mutex_unlock(&edu->thr_mutex);  in edu_fact_thread()
354         qatomic_and(&edu->status, ~EDU_STATUS_COMPUTING);  in edu_fact_thread()
359         if (qatomic_read(&edu->status) & EDU_STATUS_IRQFACT) {  in edu_fact_thread()
361             edu_raise_irq(edu, FACT_IRQ);  in edu_fact_thread()
371     EduState *edu = EDU(pdev);  in pci_edu_realize()  local
380     timer_init_ms(&edu->dma_timer, QEMU_CLOCK_VIRTUAL, edu_dma_timer, edu);  in pci_edu_realize()
382     qemu_mutex_init(&edu->thr_mutex);  in pci_edu_realize()
383     qemu_cond_init(&edu->thr_cond);  in pci_edu_realize()
384     qemu_thread_create(&edu->thread, "edu", edu_fact_thread,  in pci_edu_realize()
385                        edu, QEMU_THREAD_JOINABLE);  in pci_edu_realize()
387     memory_region_init_io(&edu->mmio, OBJECT(edu), &edu_mmio_ops, edu,  in pci_edu_realize()
389     pci_register_bar(pdev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &edu->mmio);  in pci_edu_realize()
394     EduState *edu = EDU(pdev);  in pci_edu_uninit()  local
396     qemu_mutex_lock(&edu->thr_mutex);  in pci_edu_uninit()
397     edu->stopping = true;  in pci_edu_uninit()
398     qemu_mutex_unlock(&edu->thr_mutex);  in pci_edu_uninit()
399     qemu_cond_signal(&edu->thr_cond);  in pci_edu_uninit()
400     qemu_thread_join(&edu->thread);  in pci_edu_uninit()
402     qemu_cond_destroy(&edu->thr_cond);  in pci_edu_uninit()
403     qemu_mutex_destroy(&edu->thr_mutex);  in pci_edu_uninit()
405     timer_del(&edu->dma_timer);  in pci_edu_uninit()
411     EduState *edu = EDU(obj);  in edu_instance_init()  local
413     edu->dma_mask = (1UL << 28) - 1;  in edu_instance_init()
415                                    &edu->dma_mask, OBJ_PROP_FLAG_READWRITE);  in edu_instance_init()