hw/misc/armsse-mhu.c

2  * ARM SSE-200 Message Handling Unit (MHU)
13  * This is a model of the Message Handling Unit (MHU) which is part of the
14  * Arm SSE-200 and documented in
27 #include "hw/misc/armsse-mhu.h"
60     qemu_set_irq(s->cpu0irq, s->cpu0intr != 0);  in armsse_mhu_update()
61     qemu_set_irq(s->cpu1irq, s->cpu1intr != 0);  in armsse_mhu_update()
71         r = s->cpu0intr;  in armsse_mhu_read()
75         r = s->cpu1intr;  in armsse_mhu_read()
79         r = armsse_mhu_id[(offset - A_PID4) / 4];  in armsse_mhu_read()
87                       "SSE MHU: read of write-only register at offset 0x%x\n",  in armsse_mhu_read()
111         s->cpu0intr |= (value & INTR_MASK);  in armsse_mhu_write()
114         s->cpu0intr &= ~(value & INTR_MASK);  in armsse_mhu_write()
117         s->cpu1intr |= (value & INTR_MASK);  in armsse_mhu_write()
120         s->cpu1intr &= ~(value & INTR_MASK);  in armsse_mhu_write()
127                       "SSE MHU: write to read-only register at offset 0x%x\n",  in armsse_mhu_write()
152     s->cpu0intr = 0;  in armsse_mhu_reset()
153     s->cpu1intr = 0;  in armsse_mhu_reset()
157     .name = "armsse-mhu",
172     memory_region_init_io(&s->iomem, obj, &armsse_mhu_ops,  in armsse_mhu_init()
173                           s, "armsse-mhu", 0x1000);  in armsse_mhu_init()
174     sysbus_init_mmio(sbd, &s->iomem);  in armsse_mhu_init()
175     sysbus_init_irq(sbd, &s->cpu0irq);  in armsse_mhu_init()
176     sysbus_init_irq(sbd, &s->cpu1irq);  in armsse_mhu_init()
184     dc->vmsd = &armsse_mhu_vmstate;  in armsse_mhu_class_init()