30 #define CACHE_ID 0x410000c8
69     offset &= 0xfff;  in l2x0_priv_read()
70     if (offset >= 0x730 && offset < 0x800) {  in l2x0_priv_read()
71         return 0; /* cache ops complete */  in l2x0_priv_read()
74     case 0:  in l2x0_priv_read()
76     case 0x4:  in l2x0_priv_read()
81     case 0x100:  in l2x0_priv_read()
83     case 0x104:  in l2x0_priv_read()
85     case 0x108:  in l2x0_priv_read()
87     case 0x10C:  in l2x0_priv_read()
89     case 0xC00:  in l2x0_priv_read()
91     case 0xC04:  in l2x0_priv_read()
93     case 0xF40:  in l2x0_priv_read()
94         return 0;  in l2x0_priv_read()
95     case 0xF60:  in l2x0_priv_read()
96         return 0;  in l2x0_priv_read()
97     case 0xF80:  in l2x0_priv_read()
98         return 0;  in l2x0_priv_read()
104     return 0;  in l2x0_priv_read()
111     offset &= 0xfff;  in l2x0_priv_write()
112     if (offset >= 0x730 && offset < 0x800) {  in l2x0_priv_write()
117     case 0x100:  in l2x0_priv_write()
120     case 0x104:  in l2x0_priv_write()
123     case 0x108:  in l2x0_priv_write()
126     case 0x10C:  in l2x0_priv_write()
129     case 0xC00:  in l2x0_priv_write()
132     case 0xC04:  in l2x0_priv_write()
135     case 0xF40:  in l2x0_priv_write()
137     case 0xF60:  in l2x0_priv_write()
139     case 0xF80:  in l2x0_priv_write()
152     s->ctrl = 0;  in l2x0_priv_reset()
153     s->aux_ctrl = 0x02020000;  in l2x0_priv_reset()
154     s->tag_ctrl = 0;  in l2x0_priv_reset()
155     s->data_ctrl = 0;  in l2x0_priv_reset()
156     s->filter_start = 0;  in l2x0_priv_reset()
157     s->filter_end = 0;  in l2x0_priv_reset()
172                           "l2x0_cc", 0x1000);  in l2x0_priv_init()
177     DEFINE_PROP_UINT32("cache-type", L2x0State, cache_type, 0x1c100100),