36     REG_CPUS_RST_CTRL       = 0x0000, /* CPUs Reset Control */
37     REG_CPU0_RST_CTRL       = 0x0040, /* CPU#0 Reset Control */
38     REG_CPU0_CTRL           = 0x0044, /* CPU#0 Control */
40     REG_CPU1_RST_CTRL       = 0x0080, /* CPU#1 Reset Control */
41     REG_CPU1_CTRL           = 0x0084, /* CPU#1 Control */
43     REG_CPU2_RST_CTRL       = 0x00C0, /* CPU#2 Reset Control */
44     REG_CPU2_CTRL           = 0x00C4, /* CPU#2 Control */
46     REG_CPU3_RST_CTRL       = 0x0100, /* CPU#3 Reset Control */
47     REG_CPU3_CTRL           = 0x0104, /* CPU#3 Control */
51     REG_GEN_CTRL            = 0x0184, /* General Control */
55     REG_CNT64_CTRL          = 0x0280, /* 64-bit Counter Control */
113     case REG_CPUS_RST_CTRL:     /* CPUs Reset Control */  in allwinner_cpucfg_read()
117     case REG_CPU0_RST_CTRL:     /* CPU#0 Reset Control */  in allwinner_cpucfg_read()
118     case REG_CPU1_RST_CTRL:     /* CPU#1 Reset Control */  in allwinner_cpucfg_read()
119     case REG_CPU2_RST_CTRL:     /* CPU#2 Reset Control */  in allwinner_cpucfg_read()
120     case REG_CPU3_RST_CTRL:     /* CPU#3 Reset Control */  in allwinner_cpucfg_read()
123     case REG_CPU0_CTRL:         /* CPU#0 Control */  in allwinner_cpucfg_read()
124     case REG_CPU1_CTRL:         /* CPU#1 Control */  in allwinner_cpucfg_read()
125     case REG_CPU2_CTRL:         /* CPU#2 Control */  in allwinner_cpucfg_read()
126     case REG_CPU3_CTRL:         /* CPU#3 Control */  in allwinner_cpucfg_read()
138     case REG_GEN_CTRL:          /* General Control */  in allwinner_cpucfg_read()
148     case REG_CNT64_CTRL:        /* 64-bit Counter Control */  in allwinner_cpucfg_read()
173     case REG_CPUS_RST_CTRL:     /* CPUs Reset Control */  in allwinner_cpucfg_write()
176     case REG_CPU0_RST_CTRL:     /* CPU#0 Reset Control */  in allwinner_cpucfg_write()
177     case REG_CPU1_RST_CTRL:     /* CPU#1 Reset Control */  in allwinner_cpucfg_write()
178     case REG_CPU2_RST_CTRL:     /* CPU#2 Reset Control */  in allwinner_cpucfg_write()
179     case REG_CPU3_RST_CTRL:     /* CPU#3 Reset Control */  in allwinner_cpucfg_write()
184     case REG_CPU0_CTRL:         /* CPU#0 Control */  in allwinner_cpucfg_write()
185     case REG_CPU1_CTRL:         /* CPU#1 Control */  in allwinner_cpucfg_write()
186     case REG_CPU2_CTRL:         /* CPU#2 Control */  in allwinner_cpucfg_write()
187     case REG_CPU3_CTRL:         /* CPU#3 Control */  in allwinner_cpucfg_write()
194     case REG_GEN_CTRL:          /* General Control */  in allwinner_cpucfg_write()
204     case REG_CNT64_CTRL:        /* 64-bit Counter Control */  in allwinner_cpucfg_write()