53 #define SPI_BASEADDR 0x40a00000
54 #define MEMORY_BASEADDR 0x50000000
55 #define FLASH_BASEADDR 0x86000000
56 #define INTC_BASEADDR 0x81800000
57 #define TIMER_BASEADDR 0x83c00000
58 #define UART16550_BASEADDR 0x83e00000
59 #define AXIENET_BASEADDR 0x82780000
60 #define AXIDMA_BASEADDR 0x84600000
62 #define AXIDMA_IRQ1         0
99     memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);  in petalogix_ml605_init()
105     dinfo = drive_get(IF_PFLASH, 0, 0);  in petalogix_ml605_init()
107      * 10th parameter 0 means little-endian */  in petalogix_ml605_init()
110                           64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0);  in petalogix_ml605_init()
116     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);  in petalogix_ml605_init()
117     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,  in petalogix_ml605_init()
119     for (i = 0; i < 32; i++) {  in petalogix_ml605_init()
123     serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2,  in petalogix_ml605_init()
124                    irq[UART16550_IRQ], 115200, serial_hd(0),  in petalogix_ml605_init()
129     qdev_prop_set_uint32(dev, "one-timer-only", 0);  in petalogix_ml605_init()
132     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);  in petalogix_ml605_init()
133     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);  in petalogix_ml605_init()
148     qdev_prop_set_uint32(eth0, "rxmem", 0x1000);  in petalogix_ml605_init()
149     qdev_prop_set_uint32(eth0, "txmem", 0x1000);  in petalogix_ml605_init()
155     sysbus_mmio_map(SYS_BUS_DEVICE(eth0), 0, AXIENET_BASEADDR);  in petalogix_ml605_init()
156     sysbus_connect_irq(SYS_BUS_DEVICE(eth0), 0, irq[AXIENET_IRQ]);  in petalogix_ml605_init()
168     sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR);  in petalogix_ml605_init()
169     sysbus_connect_irq(SYS_BUS_DEVICE(dma), 0, irq[AXIDMA_IRQ0]);  in petalogix_ml605_init()
179         sysbus_mmio_map(busdev, 0, SPI_BASEADDR);  in petalogix_ml605_init()
180         sysbus_connect_irq(busdev, 0, irq[SPI_IRQ]);  in petalogix_ml605_init()
184         for (i = 0; i < NUM_SPI_FLASHES; i++) {  in petalogix_ml605_init()
185             dinfo = drive_get(IF_MTD, 0, i);  in petalogix_ml605_init()
197             cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0);  in petalogix_ml605_init()
203     cpu->cfg.pvr_regs[4] = 0xc56b8000;  in petalogix_ml605_init()
204     cpu->cfg.pvr_regs[5] = 0xc56be000;  in petalogix_ml605_init()
205     cpu->cfg.pvr_regs[10] = 0x0e000000; /* virtex 6 */  in petalogix_ml605_init()