Lines Matching full:ms
141 MachineState *ms = MACHINE(lvms); in fdt_add_cpuic_node() local
144 *cpuintc_phandle = qemu_fdt_alloc_phandle(ms->fdt); in fdt_add_cpuic_node()
146 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_cpuic_node()
147 qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *cpuintc_phandle); in fdt_add_cpuic_node()
148 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", in fdt_add_cpuic_node()
150 qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0); in fdt_add_cpuic_node()
151 qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1); in fdt_add_cpuic_node()
159 MachineState *ms = MACHINE(lvms); in fdt_add_eiointc_node() local
164 *eiointc_phandle = qemu_fdt_alloc_phandle(ms->fdt); in fdt_add_eiointc_node()
166 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_eiointc_node()
167 qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *eiointc_phandle); in fdt_add_eiointc_node()
168 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", in fdt_add_eiointc_node()
170 qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0); in fdt_add_eiointc_node()
171 qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1); in fdt_add_eiointc_node()
172 qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent", in fdt_add_eiointc_node()
174 qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupts", 3); in fdt_add_eiointc_node()
175 qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0, in fdt_add_eiointc_node()
184 MachineState *ms = MACHINE(lvms); in fdt_add_pch_pic_node() local
189 *pch_pic_phandle = qemu_fdt_alloc_phandle(ms->fdt); in fdt_add_pch_pic_node()
191 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_pch_pic_node()
192 qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *pch_pic_phandle); in fdt_add_pch_pic_node()
193 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", in fdt_add_pch_pic_node()
195 qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0, in fdt_add_pch_pic_node()
197 qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0); in fdt_add_pch_pic_node()
198 qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 2); in fdt_add_pch_pic_node()
199 qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent", in fdt_add_pch_pic_node()
201 qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,pic-base-vec", 0); in fdt_add_pch_pic_node()
209 MachineState *ms = MACHINE(lvms); in fdt_add_pch_msi_node() local
214 *pch_msi_phandle = qemu_fdt_alloc_phandle(ms->fdt); in fdt_add_pch_msi_node()
216 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_pch_msi_node()
217 qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *pch_msi_phandle); in fdt_add_pch_msi_node()
218 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", in fdt_add_pch_msi_node()
220 qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", in fdt_add_pch_msi_node()
223 qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0); in fdt_add_pch_msi_node()
224 qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent", in fdt_add_pch_msi_node()
226 qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,msi-base-vec", in fdt_add_pch_msi_node()
228 qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,msi-num-vecs", in fdt_add_pch_msi_node()
235 MachineState *ms = MACHINE(lvms); in fdt_add_flash_node() local
254 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_flash_node()
255 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flash"); in fdt_add_flash_node()
256 qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", in fdt_add_flash_node()
259 qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); in fdt_add_flash_node()
269 MachineState *ms = MACHINE(lvms); in fdt_add_rtc_node() local
272 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_rtc_node()
273 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", in fdt_add_rtc_node()
275 qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); in fdt_add_rtc_node()
276 qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", in fdt_add_rtc_node()
278 qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent", in fdt_add_rtc_node()
287 MachineState *ms = MACHINE(lvms); in fdt_add_ged_reset() local
291 ged_handle = qemu_fdt_alloc_phandle(ms->fdt); in fdt_add_ged_reset()
293 qemu_fdt_add_subnode(ms->fdt, name); in fdt_add_ged_reset()
294 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon"); in fdt_add_ged_reset()
295 qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0x0, base, 0x0, size); in fdt_add_ged_reset()
297 qemu_fdt_setprop_cell(ms->fdt, name, "reg-shift", 0); in fdt_add_ged_reset()
298 qemu_fdt_setprop_cell(ms->fdt, name, "reg-io-width", 1); in fdt_add_ged_reset()
299 qemu_fdt_setprop_cell(ms->fdt, name, "phandle", ged_handle); in fdt_add_ged_reset()
300 ged_handle = qemu_fdt_get_phandle(ms->fdt, name); in fdt_add_ged_reset()
304 qemu_fdt_add_subnode(ms->fdt, name); in fdt_add_ged_reset()
305 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-reboot"); in fdt_add_ged_reset()
306 qemu_fdt_setprop_cell(ms->fdt, name, "regmap", ged_handle); in fdt_add_ged_reset()
307 qemu_fdt_setprop_cell(ms->fdt, name, "offset", ACPI_GED_REG_RESET); in fdt_add_ged_reset()
308 qemu_fdt_setprop_cell(ms->fdt, name, "value", ACPI_GED_RESET_VALUE); in fdt_add_ged_reset()
312 qemu_fdt_add_subnode(ms->fdt, name); in fdt_add_ged_reset()
313 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-poweroff"); in fdt_add_ged_reset()
314 qemu_fdt_setprop_cell(ms->fdt, name, "regmap", ged_handle); in fdt_add_ged_reset()
315 qemu_fdt_setprop_cell(ms->fdt, name, "offset", ACPI_GED_REG_SLEEP_CTL); in fdt_add_ged_reset()
316 qemu_fdt_setprop_cell(ms->fdt, name, "value", ACPI_GED_SLP_EN | in fdt_add_ged_reset()
327 MachineState *ms = MACHINE(lvms); in fdt_add_uart_node() local
330 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_uart_node()
331 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "ns16550a"); in fdt_add_uart_node()
332 qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0, base, 0x0, size); in fdt_add_uart_node()
333 qemu_fdt_setprop_cell(ms->fdt, nodename, "clock-frequency", 100000000); in fdt_add_uart_node()
335 qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename); in fdt_add_uart_node()
336 qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", irq, 0x4); in fdt_add_uart_node()
337 qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent", in fdt_add_uart_node()
344 MachineState *ms = MACHINE(lvms); in create_fdt() local
347 ms->fdt = create_device_tree(&lvms->fdt_size); in create_fdt()
348 if (!ms->fdt) { in create_fdt()
354 qemu_fdt_setprop_string(ms->fdt, "/", "compatible", in create_fdt()
356 qemu_fdt_setprop_cell(ms->fdt, "/", "#address-cells", 0x2); in create_fdt()
357 qemu_fdt_setprop_cell(ms->fdt, "/", "#size-cells", 0x2); in create_fdt()
358 qemu_fdt_add_subnode(ms->fdt, "/chosen"); in create_fdt()
362 qemu_fdt_setprop(ms->fdt, "/chosen", "rng-seed", rng_seed, sizeof(rng_seed)); in create_fdt()
368 const MachineState *ms = MACHINE(lvms); in fdt_add_cpu_nodes() local
369 int smp_cpus = ms->smp.cpus; in fdt_add_cpu_nodes()
371 qemu_fdt_add_subnode(ms->fdt, "/cpus"); in fdt_add_cpu_nodes()
372 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); in fdt_add_cpu_nodes()
373 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); in fdt_add_cpu_nodes()
381 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_cpu_nodes()
382 qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); in fdt_add_cpu_nodes()
383 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", in fdt_add_cpu_nodes()
385 if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { in fdt_add_cpu_nodes()
386 qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", in fdt_add_cpu_nodes()
387 ms->possible_cpus->cpus[cs->cpu_index].props.node_id); in fdt_add_cpu_nodes()
389 qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num); in fdt_add_cpu_nodes()
390 qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", in fdt_add_cpu_nodes()
391 qemu_fdt_alloc_phandle(ms->fdt)); in fdt_add_cpu_nodes()
396 qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); in fdt_add_cpu_nodes()
402 if (ms->smp.threads > 1) { in fdt_add_cpu_nodes()
405 num / (ms->smp.cores * ms->smp.threads), in fdt_add_cpu_nodes()
406 (num / ms->smp.threads) % ms->smp.cores, in fdt_add_cpu_nodes()
407 num % ms->smp.threads); in fdt_add_cpu_nodes()
411 num / ms->smp.cores, in fdt_add_cpu_nodes()
412 num % ms->smp.cores); in fdt_add_cpu_nodes()
414 qemu_fdt_add_path(ms->fdt, map_path); in fdt_add_cpu_nodes()
415 qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path); in fdt_add_cpu_nodes()
426 const MachineState *ms = MACHINE(lvms); in fdt_add_fw_cfg_node() local
429 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_fw_cfg_node()
430 qemu_fdt_setprop_string(ms->fdt, nodename, in fdt_add_fw_cfg_node()
432 qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", in fdt_add_fw_cfg_node()
434 qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); in fdt_add_fw_cfg_node()
446 const MachineState *ms = MACHINE(lvms); in fdt_add_pcie_irq_map_node() local
484 qemu_fdt_setprop(ms->fdt, nodename, "interrupt-map", full_irq_map, in fdt_add_pcie_irq_map_node()
487 qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupt-map-mask", in fdt_add_pcie_irq_map_node()
504 const MachineState *ms = MACHINE(lvms); in fdt_add_pcie_node() local
507 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_pcie_node()
508 qemu_fdt_setprop_string(ms->fdt, nodename, in fdt_add_pcie_node()
510 qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "pci"); in fdt_add_pcie_node()
511 qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 3); in fdt_add_pcie_node()
512 qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 2); in fdt_add_pcie_node()
513 qemu_fdt_setprop_cell(ms->fdt, nodename, "linux,pci-domain", 0); in fdt_add_pcie_node()
514 qemu_fdt_setprop_cells(ms->fdt, nodename, "bus-range", 0, in fdt_add_pcie_node()
516 qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); in fdt_add_pcie_node()
517 qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", in fdt_add_pcie_node()
519 qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", in fdt_add_pcie_node()
524 qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-map", in fdt_add_pcie_node()
532 static void fdt_add_memory_node(MachineState *ms, in fdt_add_memory_node() argument
537 qemu_fdt_add_subnode(ms->fdt, nodename); in fdt_add_memory_node()
538 qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", base >> 32, base, in fdt_add_memory_node()
540 qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory"); in fdt_add_memory_node()
542 if (ms->numa_state && ms->numa_state->num_nodes) { in fdt_add_memory_node()
543 qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", node_id); in fdt_add_memory_node()
549 static void fdt_add_memory_nodes(MachineState *ms) in fdt_add_memory_nodes() argument
555 ram_size = ms->ram_size; in fdt_add_memory_nodes()
558 nodes = nb_numa_nodes = ms->numa_state->num_nodes; in fdt_add_memory_nodes()
559 numa_info = ms->numa_state->nodes; in fdt_add_memory_nodes()
577 fdt_add_memory_node(ms, base, gap, i); in fdt_add_memory_nodes()
584 fdt_add_memory_node(ms, base, size, i); in fdt_add_memory_nodes()
593 MachineState *ms = MACHINE(lvms); in virt_build_smbios() local
605 smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64, in virt_build_smbios()
654 MachineState *ms = MACHINE(lvms); in create_acpi_ged() local
657 if (ms->ram_slots) { in create_acpi_ged()
788 MachineState *ms = MACHINE(lvms); in virt_irq_init() local
844 qdev_prop_set_uint32(ipi, "num-cpu", ms->smp.cpus); in virt_irq_init()
856 for (cpu = 0; cpu < ms->smp.cpus; cpu++) { in virt_irq_init()
870 qdev_prop_set_uint32(extioi, "num-cpu", ms->smp.cpus); in virt_irq_init()
886 for (cpu = 0; cpu < ms->smp.cpus; cpu++) { in virt_irq_init()
1083 static void fw_cfg_add_memory(MachineState *ms) in fw_cfg_add_memory() argument
1089 ram_size = ms->ram_size; in fw_cfg_add_memory()
1092 nodes = nb_numa_nodes = ms->numa_state->num_nodes; in fw_cfg_add_memory()
1093 numa_info = ms->numa_state->nodes; in fw_cfg_add_memory()
1386 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) in virt_possible_cpu_arch_ids() argument
1389 unsigned int max_cpus = ms->smp.max_cpus; in virt_possible_cpu_arch_ids()
1391 if (ms->possible_cpus) { in virt_possible_cpu_arch_ids()
1392 assert(ms->possible_cpus->len == max_cpus); in virt_possible_cpu_arch_ids()
1393 return ms->possible_cpus; in virt_possible_cpu_arch_ids()
1396 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + in virt_possible_cpu_arch_ids()
1398 ms->possible_cpus->len = max_cpus; in virt_possible_cpu_arch_ids()
1399 for (n = 0; n < ms->possible_cpus->len; n++) { in virt_possible_cpu_arch_ids()
1400 ms->possible_cpus->cpus[n].type = ms->cpu_type; in virt_possible_cpu_arch_ids()
1401 ms->possible_cpus->cpus[n].arch_id = n; in virt_possible_cpu_arch_ids()
1403 ms->possible_cpus->cpus[n].props.has_socket_id = true; in virt_possible_cpu_arch_ids()
1404 ms->possible_cpus->cpus[n].props.socket_id = in virt_possible_cpu_arch_ids()
1405 n / (ms->smp.cores * ms->smp.threads); in virt_possible_cpu_arch_ids()
1406 ms->possible_cpus->cpus[n].props.has_core_id = true; in virt_possible_cpu_arch_ids()
1407 ms->possible_cpus->cpus[n].props.core_id = in virt_possible_cpu_arch_ids()
1408 n / ms->smp.threads % ms->smp.cores; in virt_possible_cpu_arch_ids()
1409 ms->possible_cpus->cpus[n].props.has_thread_id = true; in virt_possible_cpu_arch_ids()
1410 ms->possible_cpus->cpus[n].props.thread_id = n % ms->smp.threads; in virt_possible_cpu_arch_ids()
1412 return ms->possible_cpus; in virt_possible_cpu_arch_ids()
1415 static CpuInstanceProperties virt_cpu_index_to_props(MachineState *ms, in virt_cpu_index_to_props() argument
1418 MachineClass *mc = MACHINE_GET_CLASS(ms); in virt_cpu_index_to_props()
1419 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); in virt_cpu_index_to_props()
1425 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx) in virt_get_default_cpu_node_id() argument
1429 if (ms->numa_state->num_nodes) { in virt_get_default_cpu_node_id()
1430 socket_id = ms->possible_cpus->cpus[idx].props.socket_id; in virt_get_default_cpu_node_id()
1431 return socket_id % ms->numa_state->num_nodes; in virt_get_default_cpu_node_id()