Lines Matching +full:0 +full:x47
36 #define REG_FER 0
40 #define FER_PARALLEL_EN 0x01
41 #define FER_UART1_EN 0x02
42 #define FER_UART2_EN 0x04
43 #define FER_FDC_EN 0x08
44 #define FER_FDC_4 0x10
45 #define FER_FDC_ADDR 0x20
46 #define FER_IDE_EN 0x40
47 #define FER_IDE_ADDR 0x80
49 #define FAR_PARALLEL_ADDR 0x03
50 #define FAR_UART1_ADDR 0x0C
51 #define FAR_UART2_ADDR 0x30
52 #define FAR_UART_3_4 0xC0
54 #define PTR_POWER_DOWN 0x01
55 #define PTR_CLOCK_DOWN 0x02
56 #define PTR_PWDN 0x04
57 #define PTR_IRQ_5_7 0x08
58 #define PTR_UART1_TEST 0x10
59 #define PTR_UART2_TEST 0x20
60 #define PTR_LOCK_CONF 0x40
61 #define PTR_EPP_MODE 0x80
72 static const uint16_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 };
80 static const unsigned int parallel_irq[] = { 5, 7, 5, 0 };
87 if (idx == 0) { in get_parallel_irq()
98 { 0x3e8, 0x338, 0x2e8, 0x220 },
99 { 0x2e8, 0x238, 0x2e0, 0x228 }
106 idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3; in get_uart_iobase()
107 if (idx == 0) { in get_uart_iobase()
108 return 0x3f8; in get_uart_iobase()
110 return 0x2f8; in get_uart_iobase()
120 idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3; in get_uart_irq()
144 return (s->regs[REG_FER] & FER_FDC_ADDR) ? 0x370 : 0x3f0; in get_fdc_iobase()
168 return get_ide_iobase(sio, 0) + 0x206; in get_ide_iobase()
170 return (s->regs[REG_FER] & FER_IDE_ADDR) ? 0x170 : 0x1f0; in get_ide_iobase()
175 assert(index == 0); in get_ide_irq()
188 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4b, 0x4b, in pc87312_soft_reset()
189 0x4b, 0x4b, 0x4b, 0x4b, 0x0f, 0x0f, 0x0f, 0x0f, in pc87312_soft_reset()
190 0x49, 0x49, 0x49, 0x49, 0x07, 0x07, 0x07, 0x07, in pc87312_soft_reset()
191 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x08, 0x00, in pc87312_soft_reset()
194 0x10, 0x11, 0x11, 0x39, 0x24, 0x38, 0x00, 0x01, in pc87312_soft_reset()
195 0x01, 0x09, 0x08, 0x08, 0x10, 0x11, 0x39, 0x24, in pc87312_soft_reset()
196 0x00, 0x01, 0x01, 0x00, 0x10, 0x11, 0x39, 0x24, in pc87312_soft_reset()
197 0x10, 0x11, 0x11, 0x39, 0x24, 0x38, 0x10, 0x10, in pc87312_soft_reset()
200 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in pc87312_soft_reset()
201 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in pc87312_soft_reset()
202 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in pc87312_soft_reset()
203 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, in pc87312_soft_reset()
206 s->read_id_step = 0; in pc87312_soft_reset()
209 s->regs[REG_FER] = fer_init[s->config & 0x1f]; in pc87312_soft_reset()
210 s->regs[REG_FAR] = far_init[s->config & 0x1f]; in pc87312_soft_reset()
211 s->regs[REG_PTR] = ptr_init[s->config & 0x1f]; in pc87312_soft_reset()
226 if ((addr & 1) == 0) { in pc87312_io_write()
244 if ((addr & 1) == 0) { in pc87312_io_read()
246 if (s->read_id_step++ == 0) { in pc87312_io_read()
247 val = 0x88; in pc87312_io_read()
249 val = 0; in pc87312_io_read()
259 val = 0; in pc87312_io_read()
282 return 0; in pc87312_post_load()
331 DEFINE_PROP_UINT16("iobase", PC87312State, iobase, 0x398),