Lines Matching full:lpc

58 /* ICH9 LPC PCI to ISA bridge */
74 static void ich9_cc_update(ICH9LPCState *lpc) in ich9_cc_update() argument
95 ich9_cc_update_ir(lpc->irr[slot], in ich9_cc_update()
96 pci_get_word(lpc->chip_config + *offset)); in ich9_cc_update()
106 lpc->irr[30][pci_intx] = pci_intx + 4; in ich9_cc_update()
110 static void ich9_cc_init(ICH9LPCState *lpc) in ich9_cc_init() argument
126 lpc->irr[slot][intx] = (slot + intx) % 4 + 4; in ich9_cc_init()
129 ich9_cc_update(lpc); in ich9_cc_init()
132 static void ich9_cc_reset(ICH9LPCState *lpc) in ich9_cc_reset() argument
134 uint8_t *c = lpc->chip_config; in ich9_cc_reset()
136 memset(lpc->chip_config, 0, sizeof(lpc->chip_config)); in ich9_cc_reset()
147 ich9_cc_update(lpc); in ich9_cc_reset()
162 ICH9LPCState *lpc = (ICH9LPCState *)opaque; in ich9_cc_write() local
166 memcpy(lpc->chip_config + addr, &val, len); in ich9_cc_write()
167 pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d)); in ich9_cc_write()
168 ich9_cc_update(lpc); in ich9_cc_write()
175 ICH9LPCState *lpc = (ICH9LPCState *)opaque; in ich9_cc_read() local
179 memcpy(&val, lpc->chip_config + addr, len); in ich9_cc_read()
192 static void ich9_lpc_pic_irq(ICH9LPCState *lpc, int pirq_num, in ich9_lpc_pic_irq() argument
197 ich9_lpc_rout(lpc->d.config[ICH9_LPC_PIRQA_ROUT + pirq_num], in ich9_lpc_pic_irq()
201 ich9_lpc_rout(lpc->d.config[ICH9_LPC_PIRQE_ROUT + (pirq_num - 4)], in ich9_lpc_pic_irq()
211 static void ich9_lpc_update_pic(ICH9LPCState *lpc, int gsi) in ich9_lpc_update_pic() argument
222 ich9_lpc_pic_irq(lpc, i, &tmp_irq, &tmp_dis); in ich9_lpc_update_pic()
224 pic_level |= pci_bus_get_irq_level(pci_get_bus(&lpc->d), i); in ich9_lpc_update_pic()
227 if (gsi == lpc->sci_gsi) { in ich9_lpc_update_pic()
228 pic_level |= lpc->sci_level; in ich9_lpc_update_pic()
231 qemu_set_irq(lpc->gsi[gsi], pic_level); in ich9_lpc_update_pic()
246 static void ich9_lpc_update_apic(ICH9LPCState *lpc, int gsi) in ich9_lpc_update_apic() argument
252 level |= pci_bus_get_irq_level(pci_get_bus(&lpc->d), ich9_gsi_to_pirq(gsi)); in ich9_lpc_update_apic()
253 if (gsi == lpc->sci_gsi) { in ich9_lpc_update_apic()
254 level |= lpc->sci_level; in ich9_lpc_update_apic()
257 qemu_set_irq(lpc->gsi[gsi], level); in ich9_lpc_update_apic()
262 ICH9LPCState *lpc = opaque; in ich9_lpc_set_irq() local
268 ich9_lpc_update_apic(lpc, ich9_pirq_to_gsi(pirq)); in ich9_lpc_set_irq()
269 ich9_lpc_pic_irq(lpc, pirq, &pic_irq, &pic_dis); in ich9_lpc_set_irq()
270 ich9_lpc_update_pic(lpc, pic_irq); in ich9_lpc_set_irq()
282 ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pdev); in ich9_lpc_map_irq() local
284 return lpc->irr[PCI_SLOT(pci_dev->devfn)][intx]; in ich9_lpc_map_irq()
289 ICH9LPCState *lpc = opaque; in ich9_route_intx_pin_to_irq() local
298 ich9_lpc_pic_irq(lpc, pirq_pin, &pic_irq, &pic_dis); in ich9_route_intx_pin_to_irq()
334 static int ich9_lpc_sci_irq(ICH9LPCState *lpc) in ich9_lpc_sci_irq() argument
336 uint8_t sel = lpc->d.config[ICH9_LPC_ACPI_CTRL] & in ich9_lpc_sci_irq()
352 "ICH9 LPC: SCI IRQ SEL #%u is reserved\n", sel); in ich9_lpc_sci_irq()
360 ICH9LPCState *lpc = opaque; in ich9_set_sci() local
365 if (level == lpc->sci_level) { in ich9_set_sci()
368 lpc->sci_level = level; in ich9_set_sci()
370 irq = lpc->sci_gsi; in ich9_set_sci()
376 ich9_lpc_update_apic(lpc, irq); in ich9_set_sci()
378 ich9_lpc_update_pic(lpc, irq); in ich9_set_sci()
384 ICH9LPCState *lpc = opaque; in smi_features_ok_callback() local
388 if (lpc->smi_features_ok) { in smi_features_ok_callback()
393 memcpy(&guest_features, lpc->smi_guest_features_le, sizeof guest_features); in smi_features_ok_callback()
395 if (guest_features & ~lpc->smi_host_features) { in smi_features_ok_callback()
419 lpc->smi_negotiated_features = guest_features; in smi_features_ok_callback()
420 lpc->smi_features_ok = 1; in smi_features_ok_callback()
423 static void ich9_lpc_pm_init(ICH9LPCState *lpc) in ich9_lpc_pm_init() argument
428 sci_irq = qemu_allocate_irq(ich9_set_sci, lpc, 0); in ich9_lpc_pm_init()
429 ich9_pm_init(PCI_DEVICE(lpc), &lpc->pm, sci_irq); in ich9_lpc_pm_init()
431 if (lpc->smi_host_features && fw_cfg) { in ich9_lpc_pm_init()
434 host_features_le = cpu_to_le64(lpc->smi_host_features); in ich9_lpc_pm_init()
435 memcpy(lpc->smi_host_features_le, &host_features_le, in ich9_lpc_pm_init()
438 lpc->smi_host_features_le, in ich9_lpc_pm_init()
439 sizeof lpc->smi_host_features_le); in ich9_lpc_pm_init()
446 lpc->smi_guest_features_le, in ich9_lpc_pm_init()
447 sizeof lpc->smi_guest_features_le, in ich9_lpc_pm_init()
450 smi_features_ok_callback, NULL, lpc, in ich9_lpc_pm_init()
451 &lpc->smi_features_ok, in ich9_lpc_pm_init()
452 sizeof lpc->smi_features_ok, in ich9_lpc_pm_init()
461 ICH9LPCState *lpc = arg; in ich9_apm_ctrl_changed() local
464 acpi_pm1_cnt_update(&lpc->pm.acpi_regs, in ich9_apm_ctrl_changed()
472 if (lpc->pm.smi_en & ICH9_PMIO_SMI_EN_APMC_EN) { in ich9_apm_ctrl_changed()
473 if (lpc->smi_negotiated_features & in ich9_apm_ctrl_changed()
487 ich9_lpc_pmbase_sci_update(ICH9LPCState *lpc) in ich9_lpc_pmbase_sci_update() argument
489 uint32_t pm_io_base = pci_get_long(lpc->d.config + ICH9_LPC_PMBASE); in ich9_lpc_pmbase_sci_update()
490 uint8_t acpi_cntl = pci_get_long(lpc->d.config + ICH9_LPC_ACPI_CTRL); in ich9_lpc_pmbase_sci_update()
499 ich9_pm_iospace_update(&lpc->pm, pm_io_base); in ich9_lpc_pmbase_sci_update()
501 new_gsi = ich9_lpc_sci_irq(lpc); in ich9_lpc_pmbase_sci_update()
505 if (lpc->sci_level && new_gsi != lpc->sci_gsi) { in ich9_lpc_pmbase_sci_update()
506 qemu_set_irq(lpc->pm.irq, 0); in ich9_lpc_pmbase_sci_update()
507 lpc->sci_gsi = new_gsi; in ich9_lpc_pmbase_sci_update()
508 qemu_set_irq(lpc->pm.irq, 1); in ich9_lpc_pmbase_sci_update()
510 lpc->sci_gsi = new_gsi; in ich9_lpc_pmbase_sci_update()
514 static void ich9_lpc_rcba_update(ICH9LPCState *lpc, uint32_t rcba_old) in ich9_lpc_rcba_update() argument
516 uint32_t rcba = pci_get_long(lpc->d.config + ICH9_LPC_RCBA); in ich9_lpc_rcba_update()
519 memory_region_del_subregion(get_system_memory(), &lpc->rcrb_mem); in ich9_lpc_rcba_update()
524 &lpc->rcrb_mem, 1); in ich9_lpc_rcba_update()
530 ich9_lpc_pmcon_update(ICH9LPCState *lpc) in ich9_lpc_pmcon_update() argument
532 uint16_t gen_pmcon_1 = pci_get_word(lpc->d.config + ICH9_LPC_GEN_PMCON_1); in ich9_lpc_pmcon_update()
535 if (lpc->pm.swsmi_timer_enabled) { in ich9_lpc_pmcon_update()
537 &lpc->pm, lpc->pm.smi_en & ICH9_PMIO_SMI_EN_SWSMI_EN); in ich9_lpc_pmcon_update()
539 if (lpc->pm.periodic_timer_enabled) { in ich9_lpc_pmcon_update()
541 &lpc->pm, lpc->pm.smi_en & ICH9_PMIO_SMI_EN_PERIODIC_EN); in ich9_lpc_pmcon_update()
545 wmask = pci_get_word(lpc->d.wmask + ICH9_LPC_GEN_PMCON_1); in ich9_lpc_pmcon_update()
547 pci_set_word(lpc->d.wmask + ICH9_LPC_GEN_PMCON_1, wmask); in ich9_lpc_pmcon_update()
548 lpc->pm.smi_en_wmask &= ~1; in ich9_lpc_pmcon_update()
554 ICH9LPCState *lpc = opaque; in ich9_lpc_post_load() local
556 ich9_lpc_pmbase_sci_update(lpc); in ich9_lpc_post_load()
557 ich9_lpc_rcba_update(lpc, 0 /* disabled ICH9_LPC_RCBA_EN */); in ich9_lpc_post_load()
558 ich9_lpc_pmcon_update(lpc); in ich9_lpc_post_load()
565 ICH9LPCState *lpc = ICH9_LPC_DEVICE(d); in ich9_lpc_config_write() local
571 ich9_lpc_pmbase_sci_update(lpc); in ich9_lpc_config_write()
574 ich9_lpc_rcba_update(lpc, rcba_old); in ich9_lpc_config_write()
577 pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d)); in ich9_lpc_config_write()
580 pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d)); in ich9_lpc_config_write()
583 ich9_lpc_pmcon_update(lpc); in ich9_lpc_config_write()
590 ICH9LPCState *lpc = ICH9_LPC_DEVICE(d); in ich9_lpc_reset() local
607 ich9_cc_reset(lpc); in ich9_lpc_reset()
609 ich9_lpc_pmbase_sci_update(lpc); in ich9_lpc_reset()
610 ich9_lpc_rcba_update(lpc, rcba_old); in ich9_lpc_reset()
612 lpc->sci_level = 0; in ich9_lpc_reset()
613 lpc->rst_cnt = 0; in ich9_lpc_reset()
615 memset(lpc->smi_guest_features_le, 0, sizeof lpc->smi_guest_features_le); in ich9_lpc_reset()
616 lpc->smi_features_ok = 0; in ich9_lpc_reset()
617 lpc->smi_negotiated_features = 0; in ich9_lpc_reset()
656 ICH9LPCState *lpc = opaque; in ich9_rst_cnt_write() local
662 lpc->rst_cnt = val & 0xA; /* keep FULL_RST (bit 3) and SYS_RST (bit 1) */ in ich9_rst_cnt_write()
667 ICH9LPCState *lpc = opaque; in ich9_rst_cnt_read() local
669 return lpc->rst_cnt; in ich9_rst_cnt_read()
680 ICH9LPCState *lpc = ICH9_LPC_DEVICE(obj); in ich9_lpc_initfn() local
685 object_initialize_child(obj, "rtc", &lpc->rtc, TYPE_MC146818_RTC); in ich9_lpc_initfn()
687 qdev_init_gpio_out_named(DEVICE(lpc), lpc->gsi, ICH9_GPIO_GSI, in ich9_lpc_initfn()
691 &lpc->sci_gsi, OBJ_PROP_FLAG_READ); in ich9_lpc_initfn()
692 object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_ENABLE_CMD, in ich9_lpc_initfn()
694 object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_DISABLE_CMD, in ich9_lpc_initfn()
697 &lpc->smi_negotiated_features, in ich9_lpc_initfn()
700 ich9_pm_add_properties(obj, &lpc->pm); in ich9_lpc_initfn()
705 ICH9LPCState *lpc = ICH9_LPC_DEVICE(d); in ich9_lpc_realize() local
710 if ((lpc->smi_host_features & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT)) && in ich9_lpc_realize()
711 !(lpc->smi_host_features & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT))) { in ich9_lpc_realize()
734 memory_region_init_io(&lpc->rcrb_mem, OBJECT(d), &rcrb_mmio_ops, lpc, in ich9_lpc_realize()
735 "lpc-rcrb-mmio", ICH9_CC_SIZE); in ich9_lpc_realize()
737 ich9_cc_init(lpc); in ich9_lpc_realize()
738 apm_init(d, &lpc->apm, ich9_apm_ctrl_changed, lpc); in ich9_lpc_realize()
740 lpc->machine_ready.notify = ich9_lpc_machine_ready; in ich9_lpc_realize()
741 qemu_add_machine_init_done_notifier(&lpc->machine_ready); in ich9_lpc_realize()
743 memory_region_init_io(&lpc->rst_cnt_mem, OBJECT(d), &ich9_rst_cnt_ops, lpc, in ich9_lpc_realize()
744 "lpc-reset-control", 1); in ich9_lpc_realize()
746 ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem, in ich9_lpc_realize()
749 isa_bus_register_input_irqs(isa_bus, lpc->gsi); in ich9_lpc_realize()
754 qdev_prop_set_int32(DEVICE(&lpc->rtc), "base_year", 2000); in ich9_lpc_realize()
755 if (!qdev_realize(DEVICE(&lpc->rtc), BUS(isa_bus), errp)) { in ich9_lpc_realize()
758 irq = object_property_get_uint(OBJECT(&lpc->rtc), "irq", &error_fatal); in ich9_lpc_realize()
759 isa_connect_gpio_out(ISA_DEVICE(&lpc->rtc), 0, irq); in ich9_lpc_realize()
765 ich9_lpc_pm_init(lpc); in ich9_lpc_realize()
770 ICH9LPCState *lpc = opaque; in ich9_rst_cnt_needed() local
772 return (lpc->rst_cnt != 0); in ich9_rst_cnt_needed()
788 ICH9LPCState *lpc = opaque; in ich9_smi_feat_needed() local
790 return !buffer_is_zero(lpc->smi_guest_features_le, in ich9_smi_feat_needed()
791 sizeof lpc->smi_guest_features_le) || in ich9_smi_feat_needed()
792 lpc->smi_features_ok; in ich9_smi_feat_needed()
893 dc->desc = "ICH9 LPC bridge"; in ich9_lpc_class_init()