Lines Matching +full:ctrl +full:- +full:module
18 #include "qemu/module.h"
56 #define IP_N_FROM_REG(REG) ((REG) / 2 - 1)
68 uint8_t ctrl[N_MODULES]; member
111 PCIDevice *pcidev = PCI_DEVICE(BUS(bus)->parent); in tpci200_set_irq()
113 unsigned ip_n = ip->slot; in tpci200_set_irq()
114 uint16_t prev_status = dev->status; in tpci200_set_irq()
116 assert(ip->slot >= 0 && ip->slot < N_MODULES); in tpci200_set_irq()
120 if (!(dev->ctrl[ip_n] & CTRL_INT(intno))) { in tpci200_set_irq()
126 dev->status |= STATUS_INT(ip_n, intno); in tpci200_set_irq()
128 dev->status &= ~STATUS_INT(ip_n, intno); in tpci200_set_irq()
132 if (dev->status == prev_status) { in tpci200_set_irq()
139 if (dev->ctrl[ip_n] & CTRL_INT_EDGE(intno)) { in tpci200_set_irq()
141 pci_set_irq(&dev->dev, !dev->int_set); in tpci200_set_irq()
142 pci_set_irq(&dev->dev, dev->int_set); in tpci200_set_irq()
146 uint16_t level_status = dev->status; in tpci200_set_irq()
153 if (dev->ctrl[i] & CTRL_INT_EDGE(j)) { in tpci200_set_irq()
159 if (level_status && !dev->int_set) { in tpci200_set_irq()
160 pci_irq_assert(&dev->dev); in tpci200_set_irq()
161 dev->int_set = 1; in tpci200_set_irq()
162 } else if (!level_status && dev->int_set) { in tpci200_set_irq()
163 pci_irq_deassert(&dev->dev); in tpci200_set_irq()
164 dev->int_set = 0; in tpci200_set_irq()
177 if ((addr == 0x2b && s->big_endian[0]) || in tpci200_read_cfg()
178 (addr == 0x2f && s->big_endian[1]) || in tpci200_read_cfg()
179 (addr == 0x33 && s->big_endian[2])) { in tpci200_read_cfg()
192 unsigned las = (addr - 0x2b) / 4; in tpci200_write_cfg()
193 s->big_endian[las] = val & 1; in tpci200_write_cfg()
217 ret = s->ctrl[ip_n]; in tpci200_read_las0()
227 ret = s->status; in tpci200_read_las0()
237 return adjust_value(s->big_endian[0], &ret, size); in tpci200_read_las0()
245 adjust_value(s->big_endian[0], &val, size); in tpci200_write_las0()
259 s->ctrl[ip_n] = val; in tpci200_write_las0()
273 IPackDevice *ip = ipack_device_find(&s->bus, i); in tpci200_write_las0()
278 qemu_irq_lower(&ip->irq[0]); in tpci200_write_las0()
282 qemu_irq_lower(&ip->irq[1]); in tpci200_write_las0()
288 s->status &= ~STATUS_TIME(i); in tpci200_write_las0()
315 adjust_addr(s->big_endian[1], &addr, size); in tpci200_read_las1()
318 * The address is divided into the IP module number (0-4), the IP in tpci200_read_las1()
323 ip = ipack_device_find(&s->bus, ip_n); in tpci200_read_las1()
326 DPRINTF("Read LAS1: IP module %u not installed\n", ip_n); in tpci200_read_las1()
333 if (k->id_read) { in tpci200_read_las1()
334 ret = k->id_read(ip, offset); in tpci200_read_las1()
344 bool int_set = s->status & STATUS_INT(ip_n, intno); in tpci200_read_las1()
345 bool int_edge_sensitive = s->ctrl[ip_n] & CTRL_INT_EDGE(intno); in tpci200_read_las1()
347 qemu_irq_lower(&ip->irq[intno]); in tpci200_read_las1()
351 if (k->int_read) { in tpci200_read_las1()
352 ret = k->int_read(ip, offset); in tpci200_read_las1()
358 if (k->io_read) { in tpci200_read_las1()
359 ret = k->io_read(ip, offset); in tpci200_read_las1()
365 return adjust_value(s->big_endian[1], &ret, size); in tpci200_read_las1()
376 adjust_addr(s->big_endian[1], &addr, size); in tpci200_write_las1()
377 adjust_value(s->big_endian[1], &val, size); in tpci200_write_las1()
380 * The address is divided into the IP module number, the IP in tpci200_write_las1()
385 ip = ipack_device_find(&s->bus, ip_n); in tpci200_write_las1()
388 DPRINTF("Write LAS1: IP module %u not installed\n", ip_n); in tpci200_write_las1()
395 if (k->id_write) { in tpci200_write_las1()
396 k->id_write(ip, offset, val); in tpci200_write_las1()
402 if (k->int_write) { in tpci200_write_las1()
403 k->int_write(ip, offset, val); in tpci200_write_las1()
409 if (k->io_write) { in tpci200_write_las1()
410 k->io_write(ip, offset, val); in tpci200_write_las1()
425 adjust_addr(s->big_endian[2], &addr, size); in tpci200_read_las2()
428 * The address is divided into the IP module number and the offset in tpci200_read_las2()
429 * within the IP module MEM space. in tpci200_read_las2()
433 ip = ipack_device_find(&s->bus, ip_n); in tpci200_read_las2()
436 DPRINTF("Read LAS2: IP module %u not installed\n", ip_n); in tpci200_read_las2()
439 if (k->mem_read16) { in tpci200_read_las2()
440 ret = k->mem_read16(ip, offset); in tpci200_read_las2()
444 return adjust_value(s->big_endian[2], &ret, size); in tpci200_read_las2()
455 adjust_addr(s->big_endian[2], &addr, size); in tpci200_write_las2()
456 adjust_value(s->big_endian[2], &val, size); in tpci200_write_las2()
459 * The address is divided into the IP module number and the offset in tpci200_write_las2()
460 * within the IP module MEM space. in tpci200_write_las2()
464 ip = ipack_device_find(&s->bus, ip_n); in tpci200_write_las2()
467 DPRINTF("Write LAS2: IP module %u not installed\n", ip_n); in tpci200_write_las2()
470 if (k->mem_write16) { in tpci200_write_las2()
471 k->mem_write16(ip, offset, val); in tpci200_write_las2()
482 * The address is divided into the IP module number and the offset in tpci200_read_las3()
483 * within the IP module MEM space. in tpci200_read_las3()
488 ip = ipack_device_find(&s->bus, ip_n); in tpci200_read_las3()
491 DPRINTF("Read LAS3: IP module %u not installed\n", ip_n); in tpci200_read_las3()
494 if (k->mem_read8) { in tpci200_read_las3()
495 ret = k->mem_read8(ip, offset); in tpci200_read_las3()
508 * The address is divided into the IP module number and the offset in tpci200_write_las3()
509 * within the IP module MEM space. in tpci200_write_las3()
514 ip = ipack_device_find(&s->bus, ip_n); in tpci200_write_las3()
517 DPRINTF("Write LAS3: IP module %u not installed\n", ip_n); in tpci200_write_las3()
520 if (k->mem_write8) { in tpci200_write_las3()
521 k->mem_write8(ip, offset, val); in tpci200_write_las3()
583 uint8_t *c = s->dev.config; in tpci200_realize()
595 memory_region_init_io(&s->mmio, OBJECT(s), &tpci200_cfg_ops, in tpci200_realize()
597 memory_region_init_io(&s->io, OBJECT(s), &tpci200_cfg_ops, in tpci200_realize()
599 memory_region_init_io(&s->las0, OBJECT(s), &tpci200_las0_ops, in tpci200_realize()
601 memory_region_init_io(&s->las1, OBJECT(s), &tpci200_las1_ops, in tpci200_realize()
603 memory_region_init_io(&s->las2, OBJECT(s), &tpci200_las2_ops, in tpci200_realize()
605 memory_region_init_io(&s->las3, OBJECT(s), &tpci200_las3_ops, in tpci200_realize()
607 pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio); in tpci200_realize()
608 pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io); in tpci200_realize()
609 pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las0); in tpci200_realize()
610 pci_register_bar(&s->dev, 3, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las1); in tpci200_realize()
611 pci_register_bar(&s->dev, 4, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las2); in tpci200_realize()
612 pci_register_bar(&s->dev, 5, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las3); in tpci200_realize()
614 ipack_bus_init(&s->bus, sizeof(s->bus), DEVICE(pci_dev), in tpci200_realize()
625 VMSTATE_UINT8_ARRAY(ctrl, TPCI200State, N_MODULES),
637 k->realize = tpci200_realize; in tpci200_class_init()
638 k->vendor_id = PCI_VENDOR_ID_TEWS; in tpci200_class_init()
639 k->device_id = PCI_DEVICE_ID_TEWS_TPCI200; in tpci200_class_init()
640 k->class_id = PCI_CLASS_BRIDGE_OTHER; in tpci200_class_init()
641 k->subsystem_vendor_id = PCI_VENDOR_ID_TEWS; in tpci200_class_init()
642 k->subsystem_id = 0x300A; in tpci200_class_init()
643 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); in tpci200_class_init()
644 dc->desc = "TEWS TPCI200 IndustryPack carrier"; in tpci200_class_init()
645 dc->vmsd = &vmstate_tpci200; in tpci200_class_init()