42 void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, GString *buf)  in xive2_end_queue_pic_print_info()  argument
44     uint64_t qaddr_base = xive2_end_qaddr(end);  in xive2_end_queue_pic_print_info()
45     uint32_t qsize = xive_get_field32(END2_W3_QSIZE, end->w3);  in xive2_end_queue_pic_print_info()
46     uint32_t qindex = xive_get_field32(END2_W1_PAGE_OFF, end->w1);  in xive2_end_queue_pic_print_info()
72 void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, GString *buf)  in xive2_end_pic_print_info()  argument
74     uint64_t qaddr_base = xive2_end_qaddr(end);  in xive2_end_pic_print_info()
75     uint32_t qindex = xive_get_field32(END2_W1_PAGE_OFF, end->w1);  in xive2_end_pic_print_info()
76     uint32_t qgen = xive_get_field32(END2_W1_GENERATION, end->w1);  in xive2_end_pic_print_info()
77     uint32_t qsize = xive_get_field32(END2_W3_QSIZE, end->w3);  in xive2_end_pic_print_info()
80     uint32_t nvp_blk = xive_get_field32(END2_W6_VP_BLOCK, end->w6);  in xive2_end_pic_print_info()
81     uint32_t nvp_idx = xive_get_field32(END2_W6_VP_OFFSET, end->w6);  in xive2_end_pic_print_info()
82     uint8_t priority = xive_get_field32(END2_W7_F0_PRIORITY, end->w7);  in xive2_end_pic_print_info()
85     if (!xive2_end_is_valid(end)) {  in xive2_end_pic_print_info()
89     pq = xive_get_field32(END2_W1_ESn, end->w1);  in xive2_end_pic_print_info()
97                            xive2_end_is_valid(end)    ? 'v' : '-',  in xive2_end_pic_print_info()
98                            xive2_end_is_enqueue(end)  ? 'q' : '-',  in xive2_end_pic_print_info()
99                            xive2_end_is_notify(end)   ? 'n' : '-',  in xive2_end_pic_print_info()
100                            xive2_end_is_backlog(end)  ? 'b' : '-',  in xive2_end_pic_print_info()
101                            xive2_end_is_precluded_escalation(end) ? 'p' : '-',  in xive2_end_pic_print_info()
102                            xive2_end_is_escalate(end) ? 'e' : '-',  in xive2_end_pic_print_info()
103                            xive2_end_is_escalate_end(end) ? 'N' : '-',  in xive2_end_pic_print_info()
104                            xive2_end_is_uncond_escalation(end)   ? 'u' : '-',  in xive2_end_pic_print_info()
105                            xive2_end_is_silent_escalation(end)   ? 's' : '-',  in xive2_end_pic_print_info()
106                            xive2_end_is_firmware1(end)   ? 'f' : '-',  in xive2_end_pic_print_info()
107                            xive2_end_is_firmware2(end)   ? 'F' : '-',  in xive2_end_pic_print_info()
108                            xive2_end_is_ignore(end) ? 'i' : '-',  in xive2_end_pic_print_info()
109                            xive2_end_is_crowd(end)  ? 'c' : '-',  in xive2_end_pic_print_info()
115         xive2_end_queue_pic_print_info(end, 6, buf);  in xive2_end_pic_print_info()
120 void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx,  in xive2_end_eas_pic_print_info()  argument
123     Xive2Eas *eas = (Xive2Eas *) &end->w4;  in xive2_end_eas_pic_print_info()
126     if (!xive2_end_is_escalate(end)) {  in xive2_end_eas_pic_print_info()
130     pq = xive_get_field32(END2_W1_ESe, end->w1);  in xive2_end_eas_pic_print_info()
169 static void xive2_end_enqueue(Xive2End *end, uint32_t data)  in xive2_end_enqueue()  argument
171     uint64_t qaddr_base = xive2_end_qaddr(end);  in xive2_end_enqueue()
172     uint32_t qsize = xive_get_field32(END2_W3_QSIZE, end->w3);  in xive2_end_enqueue()
173     uint32_t qindex = xive_get_field32(END2_W1_PAGE_OFF, end->w1);  in xive2_end_enqueue()
174     uint32_t qgen = xive_get_field32(END2_W1_GENERATION, end->w1);  in xive2_end_enqueue()
190         end->w1 = xive_set_field32(END2_W1_GENERATION, end->w1, qgen);  in xive2_end_enqueue()
193         end->w1 = xive_set_field32(END2_W1_GEN_FLIPPED, end->w1, qgen);  in xive2_end_enqueue()
195     end->w1 = xive_set_field32(END2_W1_PAGE_OFF, end->w1, qindex);  in xive2_end_enqueue()
443                          Xive2End *end)  in xive2_router_get_end()  argument
447    return xrc->get_end(xrtr, end_blk, end_idx, end);  in xive2_router_get_end()
451                            Xive2End *end, uint8_t word_number)  in xive2_router_write_end()  argument
455    return xrc->write_end(xrtr, end_blk, end_idx, end, word_number);  in xive2_router_write_end()
577                                        uint32_t end_idx, Xive2End *end,  in xive2_router_end_es_notify()  argument
580     uint8_t pq = xive_get_field32(end_esmask, end->w1);  in xive2_router_end_es_notify()
583     if (pq != xive_get_field32(end_esmask, end->w1)) {  in xive2_router_end_es_notify()
584         end->w1 = xive_set_field32(end_esmask, end->w1, pq);  in xive2_router_end_es_notify()
585         xive2_router_write_end(xrtr, end_blk, end_idx, end, 1);  in xive2_router_end_es_notify()
600     Xive2End end;  in xive2_router_end_notify()  local
609     if (xive2_router_get_end(xrtr, end_blk, end_idx, &end)) {  in xive2_router_end_notify()
615     if (!xive2_end_is_valid(&end)) {  in xive2_router_end_notify()
621     if (xive2_end_is_enqueue(&end)) {  in xive2_router_end_notify()
622         xive2_end_enqueue(&end, end_data);  in xive2_router_end_notify()
624         xive2_router_write_end(xrtr, end_blk, end_idx, &end, 1);  in xive2_router_end_notify()
630     if (xive2_end_is_silent_escalation(&end)) {  in xive2_router_end_notify()
642     format = xive_get_field32(END2_W6_FORMAT_BIT, end.w6);  in xive2_router_end_notify()
643     priority = xive_get_field32(END2_W7_F0_PRIORITY, end.w7);  in xive2_router_end_notify()
654     if (!xive2_end_is_notify(&end)) {  in xive2_router_end_notify()
657                                        &end, END2_W1_ESn)) {  in xive2_router_end_notify()
665     nvp_blk = xive_get_field32(END2_W6_VP_BLOCK, end.w6);  in xive2_router_end_notify()
666     nvp_idx = xive_get_field32(END2_W6_VP_OFFSET, end.w6);  in xive2_router_end_notify()
682                           xive2_end_is_ignore(&end),  in xive2_router_end_notify()
684                           xive_get_field32(END2_W7_F1_LOG_SERVER_ID, end.w7));  in xive2_router_end_notify()
697     if (xive2_end_is_backlog(&end)) {  in xive2_router_end_notify()
727     if (!xive2_end_is_escalate(&end)) {  in xive2_router_end_notify()
735     if (!xive2_end_is_uncond_escalation(&end)) {  in xive2_router_end_notify()
738                                        &end, END2_W1_ESe)) {  in xive2_router_end_notify()
747                            xive_get_field32(END2_W4_END_BLOCK,     end.w4),  in xive2_router_end_notify()
748                            xive_get_field32(END2_W4_ESC_END_INDEX, end.w4),  in xive2_router_end_notify()
749                            xive_get_field32(END2_W5_ESC_END_DATA,  end.w5));  in xive2_router_end_notify()
849     Xive2End end;  in xive2_end_source_read()  local
861     if (xive2_router_get_end(xsrc->xrtr, end_blk, end_idx, &end)) {  in xive2_end_source_read()
867     if (!xive2_end_is_valid(&end)) {  in xive2_end_source_read()
875     pq = xive_get_field32(end_esmask, end.w1);  in xive2_end_source_read()
900     if (pq != xive_get_field32(end_esmask, end.w1)) {  in xive2_end_source_read()
901         end.w1 = xive_set_field32(end_esmask, end.w1, pq);  in xive2_end_source_read()
902         xive2_router_write_end(xsrc->xrtr, end_blk, end_idx, &end, 1);  in xive2_end_source_read()
915     Xive2End end;  in xive2_end_source_write()  local
927     if (xive2_router_get_end(xsrc->xrtr, end_blk, end_idx, &end)) {  in xive2_end_source_write()
933     if (!xive2_end_is_valid(&end)) {  in xive2_end_source_write()
941     pq = xive_get_field32(end_esmask, end.w1);  in xive2_end_source_write()
969     if (pq != xive_get_field32(end_esmask, end.w1)) {  in xive2_end_source_write()
970         end.w1 = xive_set_field32(end_esmask, end.w1, pq);  in xive2_end_source_write()
971         xive2_router_write_end(xsrc->xrtr, end_blk, end_idx, &end, 1);  in xive2_end_source_write()