Lines Matching refs:TM_QW1_OS
44 case TM_QW1_OS: in exception_mask()
58 case TM_QW1_OS: in xive_tctx_output()
102 case TM_QW1_OS: in xive_tctx_notify()
126 qemu_irq_lower(xive_tctx_output(tctx, TM_QW1_OS)); in xive_tctx_reset_os_signal()
336 return xive_tctx_accept(tctx, TM_QW1_OS); in xive_tm_ack_os_reg()
342 xive_tctx_set_cppr(tctx, TM_QW1_OS, value & 0xff); in xive_tm_set_os_cppr()
352 xive_tctx_ipb_update(tctx, TM_QW1_OS, xive_priority_to_ipb(value & 0xff)); in xive_tm_set_os_pending()
372 uint32_t qw1w2 = xive_tctx_word2(&tctx->regs[TM_QW1_OS]); in xive_tctx_get_os_cam()
381 memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4); in xive_tctx_set_os_cam()
439 xive_tctx_ipb_update(tctx, TM_QW1_OS, ipb); in xive_tctx_need_resend()
492 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
493 { XIVE_TM_HV_PAGE, TM_QW1_OS + TM_WORD2, 4, xive_tm_push_os_ctx, NULL },
513 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
514 { XIVE_TM_HV_PAGE, TM_QW1_OS + TM_WORD2, 4, xive2_tm_push_os_ctx, NULL },
712 tctx->regs[TM_QW1_OS + TM_LSMFB] = 0xFF; in xive_tctx_reset()
713 tctx->regs[TM_QW1_OS + TM_ACK_CNT] = 0xFF; in xive_tctx_reset()
714 tctx->regs[TM_QW1_OS + TM_AGE] = 0xFF; in xive_tctx_reset()
720 tctx->regs[TM_QW1_OS + TM_PIPR] = in xive_tctx_reset()
721 ipb_to_pipr(tctx->regs[TM_QW1_OS + TM_IPB]); in xive_tctx_reset()
1553 uint32_t qw1w2 = xive_tctx_word2(&tctx->regs[TM_QW1_OS]); in xive_presenter_tctx_match()
1589 return TM_QW1_OS; in xive_presenter_tctx_match()