58     ir = uic->uicsr & uic->uicer & (~uic->uiccr);  in ppcuic_trigger_irq()
59     cr = uic->uicsr & uic->uicer & uic->uiccr;  in ppcuic_trigger_irq()
63                 __func__, uic->uicsr, uic->uicer, uic->uiccr,  in ppcuic_trigger_irq()
64                 uic->uicsr & uic->uicer, ir, cr);  in ppcuic_trigger_irq()
112                 uic->uicsr, mask, uic->uicsr & mask, level << irq_num);  in ppcuic_set_irq()
116     sr = uic->uicsr;  in ppcuic_set_irq()
122             uic->uicsr |= mask;  in ppcuic_set_irq()
127             uic->uicsr |= mask;  in ppcuic_set_irq()
130             uic->uicsr &= ~mask;  in ppcuic_set_irq()
135                 "%08" PRIx32 "\n", __func__, irq_num, level, uic->uicsr, sr);  in ppcuic_set_irq()
136     if (sr != uic->uicsr) {  in ppcuic_set_irq()
150         ret = uic->uicsr;  in dcr_read_uic()
165         ret = uic->uicsr & uic->uicer;  in dcr_read_uic()
196         uic->uicsr &= ~val;  in dcr_write_uic()
197         uic->uicsr |= uic->level;  in dcr_write_uic()
201         uic->uicsr |= val;  in dcr_write_uic()
237     uic->uicsr = 0x00000000;  in ppc_uic_reset()
274         VMSTATE_UINT32(uicsr, PPCUIC),