223                               xive->pc_regs[PC_NXC_PROC_CONFIG >> 3]);  in pnv_xive2_nvc_table_compress_shift()
230                              xive->pc_regs[PC_NXC_PROC_CONFIG >> 3]);  in pnv_xive2_nvg_table_compress_shift()
524     nxc_type = GETFIELD(PC_NXC_WATCH_NXC_TYPE, xive->pc_regs[spec_reg]);  in pnv_xive2_nxc_update()
525     blk = GETFIELD(PC_NXC_WATCH_BLOCK_ID, xive->pc_regs[spec_reg]);  in pnv_xive2_nxc_update()
526     idx = GETFIELD(PC_NXC_WATCH_INDEX, xive->pc_regs[spec_reg]);  in pnv_xive2_nxc_update()
531         nxc_watch[i] = cpu_to_be64(xive->pc_regs[data_reg + i]);  in pnv_xive2_nxc_update()
549     nxc_type = GETFIELD(PC_NXC_WATCH_NXC_TYPE, xive->pc_regs[spec_reg]);  in pnv_xive2_nxc_cache_load()
550     blk = GETFIELD(PC_NXC_WATCH_BLOCK_ID, xive->pc_regs[spec_reg]);  in pnv_xive2_nxc_cache_load()
551     idx = GETFIELD(PC_NXC_WATCH_INDEX, xive->pc_regs[spec_reg]);  in pnv_xive2_nxc_cache_load()
561         xive->pc_regs[data_reg + i] = be64_to_cpu(nxc_watch[i]);  in pnv_xive2_nxc_cache_load()
1427                                     xive->pc_regs[PC_NXC_PROC_CONFIG >> 3]);  in pnv_xive2_nxc_cache_watch_assign()
1428     uint64_t state = xive->pc_regs[PC_NXC_WATCH_ASSIGN >> 3];  in pnv_xive2_nxc_cache_watch_assign()
1440         xive->pc_regs[PC_NXC_WATCH_ASSIGN >> 3] = state;  in pnv_xive2_nxc_cache_watch_assign()
1448     uint64_t state = xive->pc_regs[PC_NXC_WATCH_ASSIGN >> 3];  in pnv_xive2_nxc_cache_watch_release()
1451     xive->pc_regs[PC_NXC_WATCH_ASSIGN >> 3] = state;  in pnv_xive2_nxc_cache_watch_release()
1468         val = xive->pc_regs[reg];  in pnv_xive2_ic_pc_read()
1476         val = xive->pc_regs[reg];  in pnv_xive2_ic_pc_read()
1487         xive->pc_regs[reg] &= ~(PC_NXC_WATCH_FULL | PC_NXC_WATCH_CONFLICT);  in pnv_xive2_ic_pc_read()
1489         val = xive->pc_regs[reg];  in pnv_xive2_ic_pc_read()
1502         val = xive->pc_regs[reg];  in pnv_xive2_ic_pc_read()
1509         val = xive->pc_regs[reg];  in pnv_xive2_ic_pc_read()
1513         xive->pc_regs[reg] &= ~PC_NXC_FLUSH_CTRL_POLL_VALID;  in pnv_xive2_ic_pc_read()
1514         val = xive->pc_regs[reg];  in pnv_xive2_ic_pc_read()
1521         xive->pc_regs[reg] &= ~PC_AT_KILL_VALID;  in pnv_xive2_ic_pc_read()
1522         val = xive->pc_regs[reg];  in pnv_xive2_ic_pc_read()
1535                             xive->pc_regs[PC_VSD_TABLE_ADDR >> 3]);  in pnv_xive2_pc_vst_set_data()
1537                            xive->pc_regs[PC_VSD_TABLE_ADDR >> 3]);  in pnv_xive2_pc_vst_set_data()
1590         xive->pc_regs[reg] = val;  in pnv_xive2_ic_pc_write()
1596         xive->pc_regs[PC_NXC_FLUSH_CTRL >> 3] |= PC_NXC_FLUSH_CTRL_POLL_VALID;  in pnv_xive2_ic_pc_write()
1615     xive->pc_regs[reg] = val;  in pnv_xive2_ic_pc_write()
2225     xive->pc_regs[PC_NXC_PROC_CONFIG >> 3] =  in pnv_xive2_reset()