95     uint64_t cfg_val = xive->cq_regs[CQ_XIVE_CFG >> 3];  in pnv_xive2_block_id()
583     if (xive->cq_regs[CQ_XIVE_CFG >> 3] & CQ_XIVE_CFG_GEN1_TIMA_OS) {  in pnv_xive2_get_config()
587     if (xive->cq_regs[CQ_XIVE_CFG >> 3] & CQ_XIVE_CFG_EN_VP_SAVE_RESTORE) {  in pnv_xive2_get_config()
592               xive->cq_regs[CQ_XIVE_CFG >> 3]) == CQ_XIVE_CFG_THREADID_8BITS) {  in pnv_xive2_get_config()
619         xive->cq_regs[CQ_XIVE_CFG >> 3] & CQ_XIVE_CFG_GEN1_TIMA_OS;  in pnv_xive2_match_nvt()
673     if (xive->cq_regs[CQ_XIVE_CFG >> 3] & CQ_XIVE_CFG_GEN1_TIMA_OS) {  in pnv_xive2_presenter_get_config()
722     uint8_t tsel = GETFIELD(CQ_TAR_SELECT, xive->cq_regs[CQ_TAR >> 3]);  in pnv_xive2_stt_set_data()
724                                   xive->cq_regs[CQ_TAR >> 3]);  in pnv_xive2_stt_set_data()
738     if (xive->cq_regs[CQ_TAR >> 3] & CQ_TAR_AUTOINC) {  in pnv_xive2_stt_set_data()
739         xive->cq_regs[CQ_TAR >> 3] = SETFIELD(CQ_TAR_ENTRY_SELECT,  in pnv_xive2_stt_set_data()
740                      xive->cq_regs[CQ_TAR >> 3], ++entry);  in pnv_xive2_stt_set_data()
952         val = xive->cq_regs[reg];  in pnv_xive2_ic_cq_read()
989             if (xive->cq_regs[reg] & CQ_IC_BAR_VALID) {  in pnv_xive2_ic_cq_write()
998             if (!(xive->cq_regs[reg] & CQ_IC_BAR_VALID)) {  in pnv_xive2_ic_cq_write()
1014             if (xive->cq_regs[reg] & CQ_TM_BAR_VALID) {  in pnv_xive2_ic_cq_write()
1019             if (!(xive->cq_regs[reg] & CQ_TM_BAR_VALID)) {  in pnv_xive2_ic_cq_write()
1030             if (xive->cq_regs[reg] & CQ_BAR_VALID) {  in pnv_xive2_ic_cq_write()
1035             if (!(xive->cq_regs[reg] & CQ_BAR_VALID)) {  in pnv_xive2_ic_cq_write()
1048             if (xive->cq_regs[reg] & CQ_BAR_VALID) {  in pnv_xive2_ic_cq_write()
1053             if (!(xive->cq_regs[reg] & CQ_BAR_VALID)) {  in pnv_xive2_ic_cq_write()
1066             if (xive->cq_regs[reg] & CQ_BAR_VALID) {  in pnv_xive2_ic_cq_write()
1071             if (!(xive->cq_regs[reg] & CQ_BAR_VALID)) {  in pnv_xive2_ic_cq_write()
1084             if (xive->cq_regs[reg] & CQ_BAR_VALID) {  in pnv_xive2_ic_cq_write()
1089             if (!(xive->cq_regs[reg] & CQ_BAR_VALID)) {  in pnv_xive2_ic_cq_write()
1110     xive->cq_regs[reg] = val;  in pnv_xive2_ic_cq_write()
2215     xive->cq_regs[CQ_XIVE_CAP >> 3] = xive->capabilities;  in pnv_xive2_reset()
2216     xive->cq_regs[CQ_XIVE_CFG >> 3] = xive->config;  in pnv_xive2_reset()
2219     xive->cq_regs[CQ_XIVE_CFG >> 3] |=  in pnv_xive2_reset()