44     qemu_irq fiq;  member
52     return (s->level | s->soft_level) & s->irq_enable & ~s->fiq_select;  in pl190_irq_level()
61     set = (level & s->prio_mask[s->priority]) != 0;  in pl190_update()
62     qemu_set_irq(s->irq, set);  in pl190_update()
63     set = ((s->level | s->soft_level) & s->fiq_select) != 0;  in pl190_update()
64     qemu_set_irq(s->fiq, set);  in pl190_update()
72         s->level |= 1u << irq;  in pl190_set_irq()
74         s->level &= ~(1u << irq);  in pl190_set_irq()
87         s->prio_mask[i] = mask;  in pl190_update_vectors()
88         if (s->vect_control[i] & 0x20)  in pl190_update_vectors()
90             n = s->vect_control[i] & 0x1f;  in pl190_update_vectors()
94     s->prio_mask[16] = mask;  in pl190_update_vectors()
105         return pl190_id[(offset - 0xfe0) >> 2];  in pl190_read()
108         return s->vect_addr[(offset - 0x100) >> 2];  in pl190_read()
111         return s->vect_control[(offset - 0x200) >> 2];  in pl190_read()
117         return (s->level | s->soft_level) & s->fiq_select;  in pl190_read()
119         return s->level | s->soft_level;  in pl190_read()
121         return s->fiq_select;  in pl190_read()
123         return s->irq_enable;  in pl190_read()
125         return s->soft_level;  in pl190_read()
127         return s->protected;  in pl190_read()
136         for (i = 0; i < s->priority; i++) {  in pl190_read()
137             if ((s->level | s->soft_level) & s->prio_mask[i + 1]) {  in pl190_read()
145           return s->vect_addr[16];  in pl190_read()
146         if (i < s->priority)  in pl190_read()
148             s->prev_prio[i] = s->priority;  in pl190_read()
149             s->priority = i;  in pl190_read()
152         return s->vect_addr[s->priority];  in pl190_read()
154         return s->vect_addr[16];  in pl190_read()
168         s->vect_addr[(offset - 0x100) >> 2] = val;  in pl190_write()
173         s->vect_control[(offset - 0x200) >> 2] = val;  in pl190_write()
183         s->fiq_select = val;  in pl190_write()
186         s->irq_enable |= val;  in pl190_write()
189         s->irq_enable &= ~val;  in pl190_write()
192         s->soft_level |= val;  in pl190_write()
195         s->soft_level &= ~val;  in pl190_write()
199         s->protected = val & 1;  in pl190_write()
204         if (s->priority < PL190_NUM_PRIO)  in pl190_write()
205             s->priority = s->prev_prio[s->priority];  in pl190_write()
208         s->vect_addr[16] = val;  in pl190_write()
235         s->vect_addr[i] = 0;  in pl190_reset()
236         s->vect_control[i] = 0;  in pl190_reset()
238     s->vect_addr[16] = 0;  in pl190_reset()
239     s->prio_mask[17] = 0xffffffff;  in pl190_reset()
240     s->priority = PL190_NUM_PRIO;  in pl190_reset()
246     DeviceState *dev = DEVICE(obj);  in pl190_init()
250     memory_region_init_io(&s->iomem, obj, &pl190_ops, s, "pl190", 0x1000);  in pl190_init()
251     sysbus_init_mmio(sbd, &s->iomem);  in pl190_init()
253     sysbus_init_irq(sbd, &s->irq);  in pl190_init()
254     sysbus_init_irq(sbd, &s->fiq);  in pl190_init()
281     dc->vmsd = &vmstate_pl190;  in pl190_class_init()