52     OR1KOMPICCPUState cpus[OMPIC_MAX_CPUS];  member
64         return s->cpus[src_cpu].control;  in ompic_read()
66         return s->cpus[src_cpu].status;  in ompic_read()
78         s->cpus[src_cpu].control = data;  in ompic_write()
83             s->cpus[dst_cpu].status = OMPIC_STATUS_IRQ_PENDING |  in ompic_write()
87             qemu_irq_raise(s->cpus[dst_cpu].irq);  in ompic_write()
90             s->cpus[src_cpu].status &= ~OMPIC_STATUS_IRQ_PENDING;  in ompic_write()
91             qemu_irq_lower(s->cpus[src_cpu].irq);  in ompic_write()
122         error_setg(errp, "Exceeded maximum CPUs %d", s->num_cpus);  in or1k_ompic_realize()
125     /* Init IRQ sources for all CPUs */  in or1k_ompic_realize()
127         sysbus_init_irq(sbd, &s->cpus[i].irq);  in or1k_ompic_realize()
132     DEFINE_PROP_UINT32("num-cpus", OR1KOMPICState, num_cpus, 1),
152          VMSTATE_STRUCT_ARRAY(cpus, OR1KOMPICState, OMPIC_MAX_CPUS, 1,