110     for (irq = ARMV7M_EXCP_RESET; irq < s->num_irq; irq++) {  in nvic_rettobase()
141     for (irq = NVIC_FIRST_IRQ; irq < s->num_irq; irq++) {  in nvic_isrpending()
245     for (i = 1; i < s->num_irq; i++) {  in nvic_recompute_state_secure()
309     for (i = 1; i < s->num_irq; i++) {  in nvic_recompute_state()
438     assert(irq < s->num_irq);  in set_prio()
459     assert(irq < s->num_irq);  in get_prio()
509     assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq);  in armv7m_nvic_clear_pending()
548     assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq);  in do_armv7m_nvic_set_pending()
694     assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq);  in armv7m_nvic_set_pending_lazyfp()
777     assert(pending > ARMV7M_EXCP_RESET && pending < s->num_irq);  in armv7m_nvic_acknowledge_irq()
816     assert(pending > ARMV7M_EXCP_RESET && pending < s->num_irq);  in armv7m_nvic_get_pending_irq_info()
831     assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq);  in armv7m_nvic_complete_irq()
924     assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq);  in armv7m_nvic_get_ready_status()
950     assert(n >= NVIC_FIRST_IRQ && n < s->num_irq);  in set_irq_level()
998         return ((s->num_irq - NVIC_FIRST_IRQ) / 32) - 1;  in nvic_readl()
1019         for (i = 0; i < 32 && startvec + i < s->num_irq; i++) {  in nvic_readl()
1576         for (i = 0; i < 32 && startvec + i < s->num_irq; i++) {  in nvic_writel()
2051         if (excnum < s->num_irq) {  in nvic_writel()
2233         for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) {  in nvic_sysreg_read()
2246         for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) {  in nvic_sysreg_read()
2262         for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) {  in nvic_sysreg_read()
2273         for (i = 0; i < size && startvec + i < s->num_irq; i++) {  in nvic_sysreg_read()
2363         for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) {  in nvic_sysreg_write()
2381         for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) {  in nvic_sysreg_write()
2401         for (i = 0; i < size && startvec + i < s->num_irq; i++) {  in nvic_sysreg_write()
2486     for (i = ARMV7M_EXCP_MEM; i < s->num_irq; i++) {  in nvic_post_load()
2574     DEFINE_PROP_UINT32("num-irq", NVICState, num_irq, 64),
2678     if (s->num_irq > NVIC_MAX_IRQ) {  in armv7m_nvic_realize()
2679         error_setg(errp, "num-irq %d exceeds NVIC maximum", s->num_irq);  in armv7m_nvic_realize()
2683     qdev_init_gpio_in(dev, set_irq_level, s->num_irq);  in armv7m_nvic_realize()
2686     s->num_irq += NVIC_FIRST_IRQ;  in armv7m_nvic_realize()