165 static void bmdma_setup_bar(PCIIDEState *d)  in bmdma_setup_bar()  argument
170     memory_region_init(&d->bmdma_bar, OBJECT(d), "cmd646-bmdma", 16);  in bmdma_setup_bar()
172         bm = &d->bmdma[i];  in bmdma_setup_bar()
173         memory_region_init_io(&bm->extra_io, OBJECT(d), &cmd646_bmdma_ops, bm,  in bmdma_setup_bar()
175         memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);  in bmdma_setup_bar()
176         memory_region_init_io(&bm->addr_ioport, OBJECT(d),  in bmdma_setup_bar()
179         memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);  in bmdma_setup_bar()
197     PCIIDEState *d = opaque;  in cmd646_set_irq()  local
198     PCIDevice *pd = PCI_DEVICE(d);  in cmd646_set_irq()
213     PCIIDEState *d = PCI_IDE(dev);  in cmd646_reset()  local
217         ide_bus_reset(&d->bus[i]);  in cmd646_reset()
221 static uint32_t cmd646_pci_config_read(PCIDevice *d,  in cmd646_pci_config_read()  argument
224     return pci_default_read_config(d, address, len);  in cmd646_pci_config_read()
227 static void cmd646_pci_config_write(PCIDevice *d, uint32_t addr, uint32_t val,  in cmd646_pci_config_write()  argument
232     pci_default_write_config(d, addr, val, l);  in cmd646_pci_config_write()
238             cmd646_update_udma_interrupts(d);  in cmd646_pci_config_write()
241             cmd646_update_dma_interrupts(d);  in cmd646_pci_config_write()
246     cmd646_update_irq(d);  in cmd646_pci_config_write()
252     PCIIDEState *d = PCI_IDE(dev);  in pci_cmd646_ide_realize()  local
260     if (d->secondary) {  in pci_cmd646_ide_realize()
273     memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops,  in pci_cmd646_ide_realize()
274                           &d->bus[0], "cmd646-data0", 8);  in pci_cmd646_ide_realize()
275     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]);  in pci_cmd646_ide_realize()
277     memory_region_init_io(&d->cmd_bar[0], OBJECT(d), &pci_ide_cmd_le_ops,  in pci_cmd646_ide_realize()
278                           &d->bus[0], "cmd646-cmd0", 4);  in pci_cmd646_ide_realize()
279     pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[0]);  in pci_cmd646_ide_realize()
281     memory_region_init_io(&d->data_bar[1], OBJECT(d), &pci_ide_data_le_ops,  in pci_cmd646_ide_realize()
282                           &d->bus[1], "cmd646-data1", 8);  in pci_cmd646_ide_realize()
283     pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[1]);  in pci_cmd646_ide_realize()
285     memory_region_init_io(&d->cmd_bar[1], OBJECT(d), &pci_ide_cmd_le_ops,  in pci_cmd646_ide_realize()
286                           &d->bus[1], "cmd646-cmd1", 4);  in pci_cmd646_ide_realize()
287     pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]);  in pci_cmd646_ide_realize()
289     bmdma_setup_bar(d);  in pci_cmd646_ide_realize()
290     pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);  in pci_cmd646_ide_realize()
297         ide_bus_init(&d->bus[i], sizeof(d->bus[i]), ds, i, 2);  in pci_cmd646_ide_realize()
298         ide_bus_init_output_irq(&d->bus[i], qdev_get_gpio_in(ds, i));  in pci_cmd646_ide_realize()
300         bmdma_init(&d->bus[i], &d->bmdma[i], d);  in pci_cmd646_ide_realize()
301         ide_bus_register_restart_cb(&d->bus[i]);  in pci_cmd646_ide_realize()
307     PCIIDEState *d = PCI_IDE(dev);  in pci_cmd646_ide_exitfn()  local
311         memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].extra_io);  in pci_cmd646_ide_exitfn()
312         memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].addr_ioport);  in pci_cmd646_ide_exitfn()