Lines Matching +full:pd +full:- +full:disable
28 #include "hw/qdev-properties.h"
36 #include "ide-internal.h"
55 static void cmd646_update_irq(PCIDevice *pd);
57 static void cmd646_update_dma_interrupts(PCIDevice *pd) in cmd646_update_dma_interrupts() argument
60 if (pd->config[MRDMODE] & MRDMODE_INTR_CH0) { in cmd646_update_dma_interrupts()
61 pd->config[CFR] |= CFR_INTR_CH0; in cmd646_update_dma_interrupts()
63 pd->config[CFR] &= ~CFR_INTR_CH0; in cmd646_update_dma_interrupts()
66 if (pd->config[MRDMODE] & MRDMODE_INTR_CH1) { in cmd646_update_dma_interrupts()
67 pd->config[ARTTIM23] |= ARTTIM23_INTR_CH1; in cmd646_update_dma_interrupts()
69 pd->config[ARTTIM23] &= ~ARTTIM23_INTR_CH1; in cmd646_update_dma_interrupts()
73 static void cmd646_update_udma_interrupts(PCIDevice *pd) in cmd646_update_udma_interrupts() argument
76 if (pd->config[CFR] & CFR_INTR_CH0) { in cmd646_update_udma_interrupts()
77 pd->config[MRDMODE] |= MRDMODE_INTR_CH0; in cmd646_update_udma_interrupts()
79 pd->config[MRDMODE] &= ~MRDMODE_INTR_CH0; in cmd646_update_udma_interrupts()
82 if (pd->config[ARTTIM23] & ARTTIM23_INTR_CH1) { in cmd646_update_udma_interrupts()
83 pd->config[MRDMODE] |= MRDMODE_INTR_CH1; in cmd646_update_udma_interrupts()
85 pd->config[MRDMODE] &= ~MRDMODE_INTR_CH1; in cmd646_update_udma_interrupts()
93 PCIDevice *pci_dev = PCI_DEVICE(bm->pci_dev); in bmdma_read()
97 return ((uint64_t)1 << (size * 8)) - 1; in bmdma_read()
102 val = bm->cmd; in bmdma_read()
105 val = pci_dev->config[MRDMODE]; in bmdma_read()
108 val = bm->status; in bmdma_read()
111 if (bm == &bm->pci_dev->bmdma[0]) { in bmdma_read()
112 val = pci_dev->config[UDIDETCR0]; in bmdma_read()
114 val = pci_dev->config[UDIDETCR1]; in bmdma_read()
130 PCIDevice *pci_dev = PCI_DEVICE(bm->pci_dev); in bmdma_write()
142 pci_dev->config[MRDMODE] = in bmdma_write()
143 (pci_dev->config[MRDMODE] & ~0x30) | (val & 0x30); in bmdma_write()
151 if (bm == &bm->pci_dev->bmdma[0]) { in bmdma_write()
152 pci_dev->config[UDIDETCR0] = val; in bmdma_write()
154 pci_dev->config[UDIDETCR1] = val; in bmdma_write()
170 memory_region_init(&d->bmdma_bar, OBJECT(d), "cmd646-bmdma", 16); in bmdma_setup_bar()
172 bm = &d->bmdma[i]; in bmdma_setup_bar()
173 memory_region_init_io(&bm->extra_io, OBJECT(d), &cmd646_bmdma_ops, bm, in bmdma_setup_bar()
174 "cmd646-bmdma-bus", 4); in bmdma_setup_bar()
175 memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io); in bmdma_setup_bar()
176 memory_region_init_io(&bm->addr_ioport, OBJECT(d), in bmdma_setup_bar()
178 "cmd646-bmdma-ioport", 4); in bmdma_setup_bar()
179 memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport); in bmdma_setup_bar()
183 static void cmd646_update_irq(PCIDevice *pd) in cmd646_update_irq() argument
187 pci_level = ((pd->config[MRDMODE] & MRDMODE_INTR_CH0) && in cmd646_update_irq()
188 !(pd->config[MRDMODE] & MRDMODE_BLK_CH0)) || in cmd646_update_irq()
189 ((pd->config[MRDMODE] & MRDMODE_INTR_CH1) && in cmd646_update_irq()
190 !(pd->config[MRDMODE] & MRDMODE_BLK_CH1)); in cmd646_update_irq()
191 pci_set_irq(pd, pci_level); in cmd646_update_irq()
198 PCIDevice *pd = PCI_DEVICE(d); in cmd646_set_irq() local
203 pd->config[MRDMODE] |= irq_mask; in cmd646_set_irq()
205 pd->config[MRDMODE] &= ~irq_mask; in cmd646_set_irq()
207 cmd646_update_dma_interrupts(pd); in cmd646_set_irq()
208 cmd646_update_irq(pd); in cmd646_set_irq()
217 ide_bus_reset(&d->bus[i]); in cmd646_reset()
254 uint8_t *pci_conf = dev->config; in pci_cmd646_ide_realize()
260 if (d->secondary) { in pci_cmd646_ide_realize()
261 /* XXX: if not enabled, really disable the secondary IDE controller */ in pci_cmd646_ide_realize()
265 /* Set write-to-clear interrupt bits */ in pci_cmd646_ide_realize()
266 dev->wmask[CFR] = 0x0; in pci_cmd646_ide_realize()
267 dev->w1cmask[CFR] = CFR_INTR_CH0; in pci_cmd646_ide_realize()
268 dev->wmask[ARTTIM23] = 0x0; in pci_cmd646_ide_realize()
269 dev->w1cmask[ARTTIM23] = ARTTIM23_INTR_CH1; in pci_cmd646_ide_realize()
270 dev->wmask[MRDMODE] = 0x0; in pci_cmd646_ide_realize()
271 dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; in pci_cmd646_ide_realize()
273 memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops, in pci_cmd646_ide_realize()
274 &d->bus[0], "cmd646-data0", 8); in pci_cmd646_ide_realize()
275 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]); in pci_cmd646_ide_realize()
277 memory_region_init_io(&d->cmd_bar[0], OBJECT(d), &pci_ide_cmd_le_ops, in pci_cmd646_ide_realize()
278 &d->bus[0], "cmd646-cmd0", 4); in pci_cmd646_ide_realize()
279 pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[0]); in pci_cmd646_ide_realize()
281 memory_region_init_io(&d->data_bar[1], OBJECT(d), &pci_ide_data_le_ops, in pci_cmd646_ide_realize()
282 &d->bus[1], "cmd646-data1", 8); in pci_cmd646_ide_realize()
283 pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[1]); in pci_cmd646_ide_realize()
285 memory_region_init_io(&d->cmd_bar[1], OBJECT(d), &pci_ide_cmd_le_ops, in pci_cmd646_ide_realize()
286 &d->bus[1], "cmd646-cmd1", 4); in pci_cmd646_ide_realize()
287 pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]); in pci_cmd646_ide_realize()
290 pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); in pci_cmd646_ide_realize()
297 ide_bus_init(&d->bus[i], sizeof(d->bus[i]), ds, i, 2); in pci_cmd646_ide_realize()
298 ide_bus_init_output_irq(&d->bus[i], qdev_get_gpio_in(ds, i)); in pci_cmd646_ide_realize()
300 bmdma_init(&d->bus[i], &d->bmdma[i], d); in pci_cmd646_ide_realize()
301 ide_bus_register_restart_cb(&d->bus[i]); in pci_cmd646_ide_realize()
311 memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].extra_io); in pci_cmd646_ide_exitfn()
312 memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].addr_ioport); in pci_cmd646_ide_exitfn()
327 dc->vmsd = &vmstate_ide_pci; in cmd646_ide_class_init()
328 k->realize = pci_cmd646_ide_realize; in cmd646_ide_class_init()
329 k->exit = pci_cmd646_ide_exitfn; in cmd646_ide_class_init()
330 k->vendor_id = PCI_VENDOR_ID_CMD; in cmd646_ide_class_init()
331 k->device_id = PCI_DEVICE_ID_CMD_646; in cmd646_ide_class_init()
332 k->revision = 0x07; in cmd646_ide_class_init()
333 k->class_id = PCI_CLASS_STORAGE_IDE; in cmd646_ide_class_init()
334 k->config_read = cmd646_pci_config_read; in cmd646_ide_class_init()
335 k->config_write = cmd646_pci_config_write; in cmd646_ide_class_init()
337 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); in cmd646_ide_class_init()
341 .name = "cmd646-ide",