Lines Matching full:ad
41 static bool ahci_write_fis_d2h(AHCIDevice *ad, bool d2h_fis_i);
42 static void ahci_clear_cmd_issue(AHCIDevice *ad, uint8_t slot);
43 static void ahci_init_d2h(AHCIDevice *ad);
45 static bool ahci_map_clb_address(AHCIDevice *ad);
46 static bool ahci_map_fis_address(AHCIDevice *ad);
47 static void ahci_unmap_clb_address(AHCIDevice *ad);
48 static void ahci_unmap_fis_address(AHCIDevice *ad);
235 * @ad: Device to dis/engage.
239 static int ahci_cond_start_engines(AHCIDevice *ad) in ahci_cond_start_engines() argument
241 AHCIPortRegs *pr = &ad->port_regs; in ahci_cond_start_engines()
248 if (!ahci_map_clb_address(ad)) { in ahci_cond_start_engines()
255 ahci_unmap_clb_address(ad); in ahci_cond_start_engines()
259 if (!ahci_map_fis_address(ad)) { in ahci_cond_start_engines()
266 ahci_unmap_fis_address(ad); in ahci_cond_start_engines()
578 AHCIDevice *ad = opaque; in ahci_check_cmd_bh() local
580 qemu_bh_delete(ad->check_bh); in ahci_check_cmd_bh()
581 ad->check_bh = NULL; in ahci_check_cmd_bh()
583 check_cmd(ad->hba, ad->port_no); in ahci_check_cmd_bh()
586 static void ahci_init_d2h(AHCIDevice *ad) in ahci_init_d2h() argument
588 IDEState *ide_state = &ad->port.ifs[0]; in ahci_init_d2h()
589 AHCIPortRegs *pr = &ad->port_regs; in ahci_init_d2h()
591 if (ad->init_d2h_sent) { in ahci_init_d2h()
599 if (ahci_write_fis_d2h(ad, true)) { in ahci_init_d2h()
600 ad->init_d2h_sent = true; in ahci_init_d2h()
610 static void ahci_set_signature(AHCIDevice *ad, uint32_t sig) in ahci_set_signature() argument
612 IDEState *s = &ad->port.ifs[0]; in ahci_set_signature()
618 trace_ahci_set_signature(ad->hba, ad->port_no, s->nsector, s->sector, in ahci_set_signature()
700 static bool ahci_map_fis_address(AHCIDevice *ad) in ahci_map_fis_address() argument
702 AHCIPortRegs *pr = &ad->port_regs; in ahci_map_fis_address()
703 map_page(ad->hba->as, &ad->res_fis, in ahci_map_fis_address()
705 if (ad->res_fis != NULL) { in ahci_map_fis_address()
714 static void ahci_unmap_fis_address(AHCIDevice *ad) in ahci_unmap_fis_address() argument
716 if (ad->res_fis == NULL) { in ahci_unmap_fis_address()
717 trace_ahci_unmap_fis_address_null(ad->hba, ad->port_no); in ahci_unmap_fis_address()
720 ad->port_regs.cmd &= ~PORT_CMD_FIS_ON; in ahci_unmap_fis_address()
721 dma_memory_unmap(ad->hba->as, ad->res_fis, 256, in ahci_unmap_fis_address()
723 ad->res_fis = NULL; in ahci_unmap_fis_address()
726 static bool ahci_map_clb_address(AHCIDevice *ad) in ahci_map_clb_address() argument
728 AHCIPortRegs *pr = &ad->port_regs; in ahci_map_clb_address()
729 ad->cur_cmd = NULL; in ahci_map_clb_address()
730 map_page(ad->hba->as, &ad->lst, in ahci_map_clb_address()
732 if (ad->lst != NULL) { in ahci_map_clb_address()
741 static void ahci_unmap_clb_address(AHCIDevice *ad) in ahci_unmap_clb_address() argument
743 if (ad->lst == NULL) { in ahci_unmap_clb_address()
744 trace_ahci_unmap_clb_address_null(ad->hba, ad->port_no); in ahci_unmap_clb_address()
747 ad->port_regs.cmd &= ~PORT_CMD_LIST_ON; in ahci_unmap_clb_address()
748 dma_memory_unmap(ad->hba->as, ad->lst, 1024, in ahci_unmap_clb_address()
750 ad->lst = NULL; in ahci_unmap_clb_address()
755 AHCIDevice *ad = ncq_tfs->drive; in ahci_write_fis_sdb() local
756 AHCIPortRegs *pr = &ad->port_regs; in ahci_write_fis_sdb()
760 if (!ad->res_fis || in ahci_write_fis_sdb()
765 sdb_fis = (SDBFIS *)&ad->res_fis[RES_FIS_SDBFIS]; in ahci_write_fis_sdb()
766 ide_state = &ad->port.ifs[0]; in ahci_write_fis_sdb()
774 sdb_fis->payload = cpu_to_le32(ad->finished); in ahci_write_fis_sdb()
777 pr->tfdata = (ad->port.ifs[0].error << 8) | in ahci_write_fis_sdb()
778 (ad->port.ifs[0].status & 0x77) | in ahci_write_fis_sdb()
780 pr->scr_act &= ~ad->finished; in ahci_write_fis_sdb()
781 ad->finished = 0; in ahci_write_fis_sdb()
789 ahci_trigger_irq(s, ad, AHCI_PORT_IRQ_BIT_TFES); in ahci_write_fis_sdb()
791 ahci_trigger_irq(s, ad, AHCI_PORT_IRQ_BIT_SDBS); in ahci_write_fis_sdb()
795 static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len, bool pio_fis_i) in ahci_write_fis_pio() argument
797 AHCIPortRegs *pr = &ad->port_regs; in ahci_write_fis_pio()
799 IDEState *s = &ad->port.ifs[0]; in ahci_write_fis_pio()
801 if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) { in ahci_write_fis_pio()
805 pio_fis = &ad->res_fis[RES_FIS_PSFIS]; in ahci_write_fis_pio()
830 pr->tfdata = (ad->port.ifs[0].error << 8) | in ahci_write_fis_pio()
831 ad->port.ifs[0].status; in ahci_write_fis_pio()
834 ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_TFES); in ahci_write_fis_pio()
838 static bool ahci_write_fis_d2h(AHCIDevice *ad, bool d2h_fis_i) in ahci_write_fis_d2h() argument
840 AHCIPortRegs *pr = &ad->port_regs; in ahci_write_fis_d2h()
843 IDEState *s = &ad->port.ifs[0]; in ahci_write_fis_d2h()
845 if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) { in ahci_write_fis_d2h()
849 d2h_fis = &ad->res_fis[RES_FIS_RFIS]; in ahci_write_fis_d2h()
871 pr->tfdata = (ad->port.ifs[0].error << 8) | in ahci_write_fis_d2h()
872 ad->port.ifs[0].status; in ahci_write_fis_d2h()
876 ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_TFES); in ahci_write_fis_d2h()
878 ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_DHRS); in ahci_write_fis_d2h()
892 * @ad: The AHCIDevice for whom we are building the SGList.
903 static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, in ahci_populate_sglist() argument
918 IDEBus *bus = &ad->port; in ahci_populate_sglist()
921 trace_ahci_populate_sglist(ad->hba, ad->port_no); in ahci_populate_sglist()
924 trace_ahci_populate_sglist_no_prdtl(ad->hba, ad->port_no, opts); in ahci_populate_sglist()
929 if (!(prdt = dma_memory_map(ad->hba->as, prdt_addr, &prdt_len, in ahci_populate_sglist()
932 trace_ahci_populate_sglist_no_map(ad->hba, ad->port_no); in ahci_populate_sglist()
937 trace_ahci_populate_sglist_short_map(ad->hba, ad->port_no); in ahci_populate_sglist()
958 trace_ahci_populate_sglist_bad_offset(ad->hba, ad->port_no, in ahci_populate_sglist()
965 ad->hba->as); in ahci_populate_sglist()
978 dma_memory_unmap(ad->hba->as, prdt, prdt_len, in ahci_populate_sglist()
1057 AHCIDevice *ad = ncq_tfs->drive; in execute_ncq_command() local
1058 IDEState *ide_state = &ad->port.ifs[0]; in execute_ncq_command()
1059 int port = ad->port_no; in execute_ncq_command()
1066 trace_execute_ncq_command_read(ad->hba, port, ncq_tfs->tag, in execute_ncq_command()
1076 trace_execute_ncq_command_write(ad->hba, port, ncq_tfs->tag, in execute_ncq_command()
1086 trace_execute_ncq_command_unsup(ad->hba, port, in execute_ncq_command()
1096 AHCIDevice *ad = &s->dev[port]; in process_ncq_command() local
1099 NCQTransferState *ncq_tfs = &ad->ncq_tfs[tag]; in process_ncq_command()
1119 ahci_clear_cmd_issue(ad, slot); in process_ncq_command()
1126 ahci_write_fis_d2h(ad, false); in process_ncq_command()
1129 ncq_tfs->drive = ad; in process_ncq_command()
1131 ncq_tfs->cmdh = &((AHCICmdHdr *)ad->lst)[slot]; in process_ncq_command()
1165 ahci_populate_sglist(ad, &ncq_tfs->sglist, ncq_tfs->cmdh, size, 0); in process_ncq_command()
1172 ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_OFS); in process_ncq_command()
1200 AHCIDevice *ad = &s->dev[port]; in handle_reg_h2d_fis() local
1227 ahci_clear_cmd_issue(ad, slot); in handle_reg_h2d_fis()
1303 ad->busy_slot = slot; in handle_reg_h2d_fis()
1373 AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma); in ahci_pio_transfer() local
1374 IDEState *s = &ad->port.ifs[0]; in ahci_pio_transfer()
1377 uint16_t opts = le16_to_cpu(ad->cur_cmd->opts); in ahci_pio_transfer()
1393 pio_fis_i = ad->done_first_drq || (!is_atapi && !is_write); in ahci_pio_transfer()
1394 ahci_write_fis_pio(ad, size, pio_fis_i); in ahci_pio_transfer()
1396 if (is_atapi && !ad->done_first_drq) { in ahci_pio_transfer()
1405 trace_ahci_pio_transfer(ad->hba, ad->port_no, is_write ? "writ" : "read", in ahci_pio_transfer()
1426 ad->done_first_drq = true; in ahci_pio_transfer()
1428 ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_PSS); in ahci_pio_transfer()
1435 AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma); in ahci_start_dma() local
1436 trace_ahci_start_dma(ad->hba, ad->port_no); in ahci_start_dma()
1452 AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma); in ahci_restart() local
1456 NCQTransferState *ncq_tfs = &ad->ncq_tfs[i]; in ahci_restart()
1469 AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma); in ahci_dma_prepare_buf() local
1470 IDEState *s = &ad->port.ifs[0]; in ahci_dma_prepare_buf()
1472 if (ahci_populate_sglist(ad, &s->sg, ad->cur_cmd, in ahci_dma_prepare_buf()
1474 trace_ahci_dma_prepare_buf_fail(ad->hba, ad->port_no); in ahci_dma_prepare_buf()
1479 trace_ahci_dma_prepare_buf(ad->hba, ad->port_no, limit, s->io_buffer_size); in ahci_dma_prepare_buf()
1490 AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma); in ahci_commit_buf() local
1492 tx_bytes += le32_to_cpu(ad->cur_cmd->status); in ahci_commit_buf()
1493 ad->cur_cmd->status = cpu_to_le32(tx_bytes); in ahci_commit_buf()
1498 AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma); in ahci_dma_rw_buf() local
1499 IDEState *s = &ad->port.ifs[0]; in ahci_dma_rw_buf()
1503 if (ahci_populate_sglist(ad, &s->sg, ad->cur_cmd, l, s->io_buffer_offset)) { in ahci_dma_rw_buf()
1517 trace_ahci_dma_rw_buf(ad->hba, ad->port_no, l); in ahci_dma_rw_buf()
1521 static void ahci_clear_cmd_issue(AHCIDevice *ad, uint8_t slot) in ahci_clear_cmd_issue() argument
1523 IDEState *ide_state = &ad->port.ifs[0]; in ahci_clear_cmd_issue()
1527 ad->port_regs.cmd_issue &= ~(1 << slot); in ahci_clear_cmd_issue()
1534 AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma); in ahci_cmd_done() local
1535 IDEState *ide_state = &ad->port.ifs[0]; in ahci_cmd_done()
1537 trace_ahci_cmd_done(ad->hba, ad->port_no); in ahci_cmd_done()
1540 if (ad->busy_slot != -1) { in ahci_cmd_done()
1541 ahci_clear_cmd_issue(ad, ad->busy_slot); in ahci_cmd_done()
1542 ad->busy_slot = -1; in ahci_cmd_done()
1550 ahci_write_fis_d2h(ad, true); in ahci_cmd_done()
1553 ad->port_regs.cmd_issue && !ad->check_bh) { in ahci_cmd_done()
1554 ad->check_bh = qemu_bh_new_guarded(ahci_check_cmd_bh, ad, in ahci_cmd_done()
1555 &ad->mem_reentrancy_guard); in ahci_cmd_done()
1556 qemu_bh_schedule(ad->check_bh); in ahci_cmd_done()
1596 AHCIDevice *ad = &s->dev[i]; in ahci_realize() local
1598 ide_bus_init(&ad->port, sizeof(ad->port), qdev, i, 1); in ahci_realize()
1599 ide_bus_init_output_irq(&ad->port, irqs[i]); in ahci_realize()
1601 ad->hba = s; in ahci_realize()
1602 ad->port_no = i; in ahci_realize()
1603 ad->port.dma = &ad->dma; in ahci_realize()
1604 ad->port.dma->ops = &ahci_dma_ops; in ahci_realize()
1605 ide_bus_register_restart_cb(&ad->port); in ahci_realize()
1615 AHCIDevice *ad = &s->dev[i]; in ahci_uninit() local
1618 ide_exit(&ad->port.ifs[j]); in ahci_uninit()
1620 object_unparent(OBJECT(&ad->port)); in ahci_uninit()
1703 struct AHCIDevice *ad; in ahci_state_post_load() local
1709 ad = &s->dev[i]; in ahci_state_post_load()
1710 pr = &ad->port_regs; in ahci_state_post_load()
1726 if (ahci_cond_start_engines(ad) != 0) { in ahci_state_post_load()
1731 ncq_tfs = &ad->ncq_tfs[j]; in ahci_state_post_load()
1732 ncq_tfs->drive = ad; in ahci_state_post_load()
1763 * If an error is present, ad->busy_slot will be valid and not -1. in ahci_state_post_load()
1770 if (ad->busy_slot == -1) { in ahci_state_post_load()
1775 if (ad->busy_slot < 0 || ad->busy_slot >= AHCI_MAX_CMDS) { in ahci_state_post_load()
1778 ad->cur_cmd = get_cmd_header(s, i, ad->busy_slot); in ahci_state_post_load()