207     target_ulong ip = *pip;  in evaluate_tpr_instruction()  local
212     if ((ip & 0xf0000000ULL) != 0x80000000ULL &&  in evaluate_tpr_instruction()
213         (ip & 0xf0000000ULL) != 0xe0000000ULL) {  in evaluate_tpr_instruction()
241             if (cpu_memory_rw_debug(cs, ip - instr->length, opcode,  in evaluate_tpr_instruction()
246                 ip -= instr->length;  in evaluate_tpr_instruction()
252         if (cpu_memory_rw_debug(cs, ip, opcode, sizeof(opcode), 0) < 0) {  in evaluate_tpr_instruction()
269     if (cpu_memory_rw_debug(cs, ip + instr->addr_offset,  in evaluate_tpr_instruction()
281     *pip = ip;  in evaluate_tpr_instruction()
285 static int update_rom_mapping(VAPICROMState *s, CPUX86State *env, target_ulong ip)  in update_rom_mapping()  argument
303     rom_state_vaddr = s->rom_state_paddr + (ip & 0xf0000000);  in update_rom_mapping()
390 static void patch_call(X86CPU *cpu, target_ulong ip, uint32_t target)  in patch_call()  argument
394     offset = cpu_to_le32(target - ip - 5);  in patch_call()
395     patch_byte(cpu, ip, 0xe8); /* call near */  in patch_call()
396     cpu_memory_rw_debug(CPU(cpu), ip + 1, (void *)&offset, sizeof(offset), 1);  in patch_call()
401     target_ulong ip;  member
409     target_ulong ip = info->ip;  in do_patch_instruction()  local
413     cpu_memory_rw_debug(cs, ip, opcode, sizeof(opcode), 0);  in do_patch_instruction()
417         patch_byte(x86_cpu, ip, 0x50 + modrm_reg(opcode[1]));  /* push reg */  in do_patch_instruction()
418         patch_call(x86_cpu, ip + 1, handlers->set_tpr);  in do_patch_instruction()
421         patch_byte(x86_cpu, ip, 0x90);  in do_patch_instruction()
422         patch_call(x86_cpu, ip + 1, handlers->get_tpr[modrm_reg(opcode[1])]);  in do_patch_instruction()
425         patch_call(x86_cpu, ip, handlers->get_tpr[0]);  in do_patch_instruction()
428         patch_call(x86_cpu, ip, handlers->set_tpr_eax);  in do_patch_instruction()
431         patch_byte(x86_cpu, ip, 0x68);  /* push imm32 */  in do_patch_instruction()
432         cpu_memory_rw_debug(cs, ip + 6, (void *)&imm32, sizeof(imm32), 0);  in do_patch_instruction()
433         cpu_memory_rw_debug(cs, ip + 1, (void *)&imm32, sizeof(imm32), 1);  in do_patch_instruction()
434         patch_call(x86_cpu, ip + 5, handlers->set_tpr);  in do_patch_instruction()
437         patch_byte(x86_cpu, ip, 0x50); /* push eax */  in do_patch_instruction()
438         patch_call(x86_cpu, ip + 1, handlers->get_tpr_stack);  in do_patch_instruction()
447 static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)  in patch_instruction()  argument
462     info->ip = ip;  in patch_instruction()
467 void vapic_report_tpr_access(DeviceState *dev, CPUState *cs, target_ulong ip,  in vapic_report_tpr_access()  argument
476     if (evaluate_tpr_instruction(s, cpu, &ip, access) < 0) {  in vapic_report_tpr_access()
482     if (update_rom_mapping(s, env, ip) < 0) {  in vapic_report_tpr_access()
488     patch_instruction(s, cpu, ip);  in vapic_report_tpr_access()