Lines Matching full:invalidation

60 #define DMAR_IQH_REG            0x80 /* Invalidation queue head */
62 #define DMAR_IQT_REG            0x88 /* Invalidation queue tail */
64 #define DMAR_IQA_REG            0x90 /* Invalidation queue addr */
66 #define DMAR_ICS_REG            0x9c /* Invalidation complete status */
69 #define DMAR_IECTL_REG          0xa0 /* Invalidation event control */
70 #define DMAR_IEDATA_REG         0xa4 /* Invalidation event data */
71 #define DMAR_IEADDR_REG         0xa8 /* Invalidation event address */
72 #define DMAR_IEUADDR_REG        0xac /* Invalidation event address */
123 #define VTD_TLB_GLOBAL_FLUSH        (1ULL << 60) /* Global invalidation */
323 /* Interrupt Entry Cache Invalidation Descriptor: VT-d 6.5.2.7. */
328     uint64_t index_mask:5;      /* 2^N for continuous int invalidation */
330     uint64_t granularity:1;     /* If set, it's global IR invalidation */
334     uint32_t granularity:1;     /* If set, it's global IR invalidation */
336     uint32_t index_mask:5;      /* 2^N for continuous int invalidation */
343 /* Queued Invalidation Descriptor */
367 #define VTD_INV_DESC_WAIT               0x5 /* Invalidation Wait Descriptor */
372 /* Masks for Invalidation Wait Descriptor*/
380 /* Masks for Context-cache Invalidation Descriptor */