Lines Matching refs:DMAR_FSTS_REG
479 vtd_set_clear_mask_long(s, DMAR_FSTS_REG, VTD_FSTS_PPF, ppf_mask); in vtd_update_fsts_ppf()
531 uint32_t fsts_reg = vtd_get_long_raw(s, DMAR_FSTS_REG); in vtd_report_frcd_fault()
548 vtd_set_clear_mask_long(s, DMAR_FSTS_REG, 0, VTD_FSTS_PFO); in vtd_report_frcd_fault()
563 vtd_set_clear_mask_long(s, DMAR_FSTS_REG, VTD_FSTS_FRI_MASK, in vtd_report_frcd_fault()
616 uint32_t fsts_reg = vtd_get_long_raw(s, DMAR_FSTS_REG); in vtd_handle_inv_queue_error()
618 vtd_set_clear_mask_long(s, DMAR_FSTS_REG, 0, VTD_FSTS_IQE); in vtd_handle_inv_queue_error()
2357 if (!(vtd_get_long_raw(s, DMAR_FSTS_REG) & VTD_FSTS_IQE)) { in vtd_handle_gcmd_qie()
2855 if (s->qi_enabled && !(vtd_get_long_raw(s, DMAR_FSTS_REG) & VTD_FSTS_IQE)) { in vtd_handle_iqt_write()
2863 uint32_t fsts_reg = vtd_get_long_raw(s, DMAR_FSTS_REG); in vtd_handle_fsts_write()
3041 case DMAR_FSTS_REG: in vtd_mem_write()
4171 vtd_define_long(s, DMAR_FSTS_REG, 0, 0, 0x11UL); in vtd_init()