Lines Matching defs:addr
87 static void vtd_define_quad(IntelIOMMUState *s, hwaddr addr, uint64_t val, in vtd_define_quad()
95 static void vtd_define_quad_wo(IntelIOMMUState *s, hwaddr addr, uint64_t mask) in vtd_define_quad_wo()
100 static void vtd_define_long(IntelIOMMUState *s, hwaddr addr, uint32_t val, in vtd_define_long()
108 static void vtd_define_long_wo(IntelIOMMUState *s, hwaddr addr, uint32_t mask) in vtd_define_long_wo()
114 static void vtd_set_quad(IntelIOMMUState *s, hwaddr addr, uint64_t val) in vtd_set_quad()
123 static void vtd_set_long(IntelIOMMUState *s, hwaddr addr, uint32_t val) in vtd_set_long()
132 static uint64_t vtd_get_quad(IntelIOMMUState *s, hwaddr addr) in vtd_get_quad()
139 static uint32_t vtd_get_long(IntelIOMMUState *s, hwaddr addr) in vtd_get_long()
147 static uint64_t vtd_get_quad_raw(IntelIOMMUState *s, hwaddr addr) in vtd_get_quad_raw()
152 static uint32_t vtd_get_long_raw(IntelIOMMUState *s, hwaddr addr) in vtd_get_long_raw()
157 static void vtd_set_quad_raw(IntelIOMMUState *s, hwaddr addr, uint64_t val) in vtd_set_quad_raw()
162 static uint32_t vtd_set_clear_mask_long(IntelIOMMUState *s, hwaddr addr, in vtd_set_clear_mask_long()
170 static uint64_t vtd_set_clear_mask_quad(IntelIOMMUState *s, hwaddr addr, in vtd_set_clear_mask_quad()
350 static uint64_t vtd_get_iotlb_gfn(hwaddr addr, uint32_t level) in vtd_get_iotlb_gfn()
357 uint32_t pasid, hwaddr addr) in vtd_lookup_iotlb()
380 uint16_t domain_id, hwaddr addr, uint64_t slpte, in vtd_update_iotlb()
456 hwaddr addr = DMAR_FRCD_REG_OFFSET + (((uint64_t)index) << 4); in vtd_is_frcd_set() local
486 hwaddr addr = DMAR_FRCD_REG_OFFSET + (((uint64_t)index) << 4); in vtd_set_frcd_and_update_ppf() local
514 hwaddr addr = DMAR_FRCD_REG_OFFSET + 8; /* The high 64-bit half */ in vtd_try_collapse_fault() local
579 hwaddr addr, VTDFaultReason fault, in vtd_report_dmar_fault()
657 dma_addr_t addr; in vtd_get_root_entry() local
680 dma_addr_t addr, ce_size; in vtd_get_context_entry_from_root() local
792 dma_addr_t addr, entry_size; in vtd_get_pdire_from_pdir_table() local
814 dma_addr_t addr, in vtd_get_pe_in_pasid_leaf_table()
853 dma_addr_t addr = pdire->val & VTD_PASID_TABLE_BASE_ADDR_MASK; in vtd_get_pe_from_pdire() local
1116 dma_addr_t addr = vtd_get_iova_pgtbl_base(s, ce, pasid); in vtd_iova_to_slpte() local
1311 static int vtd_page_walk_level(dma_addr_t addr, uint64_t start, in vtd_page_walk_level()
1409 dma_addr_t addr = vtd_get_iova_pgtbl_base(s, ce, pasid); in vtd_page_walk() local
1584 hwaddr addr, hwaddr size) in vtd_sync_shadow_page_table_range()
1812 static inline bool vtd_is_interrupt_addr(hwaddr addr) in vtd_is_interrupt_addr()
1864 hwaddr addr, in vtd_report_fault()
1890 uint8_t devfn, hwaddr addr, bool is_write, in vtd_do_iommu_translate()
2219 uint16_t domain_id, hwaddr addr, in vtd_iotlb_page_invalidate_notify()
2264 hwaddr addr, uint8_t am) in vtd_iotlb_page_invalidate()
2289 hwaddr addr; in vtd_iotlb_flush() local
2519 dma_addr_t addr = base_addr + offset * dw; in vtd_get_inv_desc() local
2612 hwaddr addr; in vtd_process_iotlb_desc() local
2670 bool size, hwaddr addr) in do_invalidate_device_tlb()
2705 hwaddr addr; in vtd_process_device_iotlb_desc() local
2921 static uint64_t vtd_mem_read(void *opaque, hwaddr addr, unsigned size) in vtd_mem_read()
2974 static void vtd_mem_write(void *opaque, hwaddr addr, in vtd_mem_write()
3215 static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr addr, in vtd_iommu_translate()
3385 dma_addr_t addr = 0x00; in vtd_irte_get() local
3530 VTD_IR_MSIAddress addr; in vtd_interrupt_remap_msi() local
3635 static MemTxResult vtd_mem_ir_read(void *opaque, hwaddr addr, in vtd_mem_ir_read()
3642 static MemTxResult vtd_mem_ir_write(void *opaque, hwaddr addr, in vtd_mem_ir_write()
3684 hwaddr addr, bool is_write) in vtd_report_ir_illegal_access()
3707 static MemTxResult vtd_mem_ir_fault_read(void *opaque, hwaddr addr, in vtd_mem_ir_fault_read()
3716 static MemTxResult vtd_mem_ir_fault_write(void *opaque, hwaddr addr, in vtd_mem_ir_fault_write()