Lines Matching +full:pm +full:- +full:bus
3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
26 #include "acpi-build.h"
27 #include "acpi-common.h"
29 #include "qemu/error-report.h"
35 #include "hw/acpi/acpi-defs.h"
39 #include "hw/acpi/bios-linker-loader.h"
51 #include "hw/mem/memory-device.h"
55 #include "hw/hyperv/vmbus-bridge.h"
63 #include "hw/pci-host/i440fx.h"
64 #include "hw/pci-host/q35.h"
65 #include "hw/i386/x86-iommu.h"
67 #include "hw/acpi/aml-build.h"
72 #include "qom/qom-qobject.h"
75 #include "hw/virtio/virtio-iommu.h"
82 /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and
83 * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows
139 * "ICH9-LPC" or "PIIX4_PM" has "smm-compat" property to keep the old in init_common_fadt_data()
143 bool smm_enabled = object_property_get_bool(o, "smm-compat", NULL) ? in init_common_fadt_data()
159 ((ms->smp.max_cpus > 8) ? in init_common_fadt_data()
186 * ACPI v2, Table 5-10 - Fixed ACPI Description Table Boot Architecture in init_common_fadt_data()
187 * Flags, bit offset 1 - 8042. in init_common_fadt_data()
194 static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm) in acpi_get_pm_info() argument
200 pm->cpu_hp_io_base = 0; in acpi_get_pm_info()
201 pm->pcihp_io_base = 0; in acpi_get_pm_info()
202 pm->pcihp_io_len = 0; in acpi_get_pm_info()
203 pm->smi_on_cpuhp = false; in acpi_get_pm_info()
204 pm->smi_on_cpu_unplug = false; in acpi_get_pm_info()
207 init_common_fadt_data(machine, obj, &pm->fadt); in acpi_get_pm_info()
210 pm->fadt.rev = 1; in acpi_get_pm_info()
211 pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; in acpi_get_pm_info()
218 pm->fadt.reset_reg = r; in acpi_get_pm_info()
219 pm->fadt.reset_val = 0xf; in acpi_get_pm_info()
220 pm->fadt.flags |= 1 << ACPI_FADT_F_RESET_REG_SUP; in acpi_get_pm_info()
221 pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; in acpi_get_pm_info()
222 pm->smi_on_cpuhp = in acpi_get_pm_info()
224 pm->smi_on_cpu_unplug = in acpi_get_pm_info()
227 pm->pcihp_io_base = in acpi_get_pm_info()
229 pm->pcihp_io_len = in acpi_get_pm_info()
235 pm->s3_disabled = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_pm_info()
237 pm->s3_disabled = false; in acpi_get_pm_info()
242 pm->s4_disabled = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_pm_info()
244 pm->s4_disabled = false; in acpi_get_pm_info()
249 pm->s4_val = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_pm_info()
251 pm->s4_val = false; in acpi_get_pm_info()
255 pm->pcihp_bridge_en = in acpi_get_pm_info()
258 pm->pcihp_root_en = in acpi_get_pm_info()
265 info->has_hpet = hpet_find(); in acpi_get_misc_info()
267 info->tpm_version = tpm_get_version(tpm_find()); in acpi_get_misc_info()
373 UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); in build_append_pci_dsm_func0_common()
429 * So use runtime assignment to set acpi-index after initializer in aml_pci_edsm()
446 g_assert(pdev->acpi_index != 0); in aml_pci_static_endpoint_dsm()
451 aml_append(pkg, aml_int(pdev->acpi_index)); in aml_pci_static_endpoint_dsm()
471 static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus) in is_devfn_ignored_generic() argument
473 const PCIDevice *pdev = bus->devices[devfn]; in is_devfn_ignored_generic()
481 if (DEVICE(pdev)->hotplugged) { in is_devfn_ignored_generic()
489 static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus) in is_devfn_ignored_hotplug() argument
491 PCIDevice *pdev = bus->devices[devfn]; in is_devfn_ignored_hotplug()
493 return is_devfn_ignored_generic(devfn, bus) || in is_devfn_ignored_hotplug()
494 !DEVICE_GET_CLASS(pdev)->hotpluggable || in is_devfn_ignored_hotplug()
495 /* Cold plugged bridges aren't themselves hot-pluggable */ in is_devfn_ignored_hotplug()
496 (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged); in is_devfn_ignored_hotplug()
499 * hotplug is supported only for non-multifunction device in is_devfn_ignored_hotplug()
503 (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) { in is_devfn_ignored_hotplug()
510 void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus) in build_append_pcihp_slots() argument
514 QObject *bsel = object_property_get_qobject(OBJECT(bus), in build_append_pcihp_slots()
522 for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { in build_append_pcihp_slots()
526 if (is_devfn_ignored_hotplug(devfn, bus)) { in build_append_pcihp_slots()
530 if (bus->devices[devfn]) { in build_append_pcihp_slots()
560 void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) in build_append_pci_bus_devices() argument
565 for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { in build_append_pci_bus_devices()
566 /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */ in build_append_pci_bus_devices()
568 PCIDevice *pdev = bus->devices[devfn]; in build_append_pci_bus_devices()
570 if (!pdev || is_devfn_ignored_generic(devfn, bus)) { in build_append_pci_bus_devices()
578 call_dev_aml_func(DEVICE(bus->devices[devfn]), dev); in build_append_pci_bus_devices()
579 /* add _DSM if device has acpi-index set */ in build_append_pci_bus_devices()
580 if (pdev->acpi_index && in build_append_pci_bus_devices()
592 const PCIBus *bus) in build_append_notfication_callback() argument
600 QLIST_FOREACH(sec, &bus->child, sibling) { in build_append_notfication_callback()
601 Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn); in build_append_notfication_callback()
609 * and keep track of bus that have PCNT, in build_append_notfication_callback()
610 * bus list is used later to call children PCNTs from this level PCNT in build_append_notfication_callback()
625 /* If bus supports hotplug select it and notify about local events */ in build_append_notfication_callback()
626 bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL); in build_append_notfication_callback()
638 /* Notify about child bus events in any case */ in build_append_notfication_callback()
640 aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn)); in build_append_notfication_callback()
674 * advertise function 7 if device has acpi-index in aml_pci_pdsm()
678 * other: device's acpi-index in aml_pci_pdsm()
740 * build_prt - Define interrupt routing rules
746 * The hash function is: (slot + pin) & 3 -> "LNK[D|A|B|C]".
765 /* device 1 is the power-management device, needs SCI */ in build_prt()
863 aml_append(crs, aml_irq_no_flags(vmbus_bridge->irq)); in build_vmbus_device_aml()
960 * _DIS can be no-op because the interrupt cannot be disabled. in build_gsi_link_dev()
971 /* _CRS method - get current settings */
1001 /* _STA method - get status */
1047 * so these are no-ops. We only need this link to override the in build_piix4_pci0_int()
1080 head = name[3] - base; in append_q35_prt_entry()
1083 head = i * -1; in append_q35_prt_entry()
1111 /* INTA -> PIRQA for slot 25 - 31, see the default value of D<N>IR */ in build_q35_routing_table()
1117 /* PCIe->PCI bridge. use PIRQ[E-H] */ in build_q35_routing_table()
1199 if (mcfg->base + mcfg->size - 1 >= (1ULL << 32)) { in build_q35_dram_controller()
1207 mcfg->base, in build_q35_dram_controller()
1208 mcfg->base + mcfg->size - 1, in build_q35_dram_controller()
1210 mcfg->size)); in build_q35_dram_controller()
1219 mcfg->base, in build_q35_dram_controller()
1220 mcfg->base + mcfg->size - 1, in build_q35_dram_controller()
1222 mcfg->size)); in build_q35_dram_controller()
1298 aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"))); in build_q35_osc_method()
1307 * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled. in build_q35_osc_method()
1354 AcpiPmInfo *pm, AcpiMiscInfo *misc, in build_dsdt() argument
1368 uint32_t nr_mem = machine->ram_slots; in build_dsdt()
1370 PCIBus *bus = NULL; in build_dsdt() local
1377 AcpiTable table = { .sig = "DSDT", .rev = 1, .oem_id = x86ms->oem_id, in build_dsdt()
1378 .oem_table_id = x86ms->oem_table_id }; in build_dsdt()
1390 aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))); in build_dsdt()
1395 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { in build_dsdt()
1396 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); in build_dsdt()
1404 aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))); in build_dsdt()
1405 aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en)); in build_dsdt()
1412 if (pm->smi_on_cpuhp) { in build_dsdt()
1421 pm->fadt.smi_cmd, in build_dsdt()
1422 pm->fadt.smi_cmd, in build_dsdt()
1428 aml_int(pm->fadt.smi_cmd), 2)); in build_dsdt()
1439 if (pm->pcihp_bridge_en) { in build_dsdt()
1440 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); in build_dsdt()
1445 if (misc->has_hpet) { in build_dsdt()
1458 if (machine->nvdimms_state->is_enabled) { in build_dsdt()
1467 if (pcmc->legacy_cpu_hotplug) { in build_dsdt()
1468 build_legacy_cpu_hotplug_aml(dsdt, machine, pm->cpu_hp_io_base); in build_dsdt()
1472 .smi_path = pm->smi_on_cpuhp ? "\\_SB.PCI0.SMI0.SMIC" : NULL, in build_dsdt()
1473 .fw_unplugs_cpu = pm->smi_on_cpu_unplug, in build_dsdt()
1476 pm->cpu_hp_io_base, "\\_SB.PCI0", "\\_GPE._E02", in build_dsdt()
1480 if (pcms->memhp_io_base && nr_mem) { in build_dsdt()
1483 pcms->memhp_io_base); in build_dsdt()
1487 bus = PC_MACHINE(machine)->pcibus; in build_dsdt()
1488 if (bus) { in build_dsdt()
1489 QLIST_FOREACH(bus, &bus->child, sibling) { in build_dsdt()
1490 uint8_t bus_num = pci_bus_num(bus); in build_dsdt()
1491 uint8_t numa_node = pci_bus_numa_node(bus); in build_dsdt()
1495 if (!pci_bus_is_root(bus)) { in build_dsdt()
1500 root_bus_limit = bus_num - 1; in build_dsdt()
1503 uid = object_property_get_uint(OBJECT(bus), "acpi_uid", in build_dsdt()
1507 if (pci_bus_is_cxl(bus)) { in build_dsdt()
1514 if (pci_bus_is_cxl(bus)) { in build_dsdt()
1522 } else if (pci_bus_is_express(bus)) { in build_dsdt()
1526 /* Expander bridges do not have ACPI PCI Hot-plug enabled */ in build_dsdt()
1537 crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set, in build_dsdt()
1544 if (pci_bus_is_cxl(bus)) { in build_dsdt()
1545 MemoryRegion *mr = &pcms->cxl_devices_state.host_mr; in build_dsdt()
1546 uint64_t base = mr->addr; in build_dsdt()
1550 base + memory_region_size(mr) - 1); in build_dsdt()
1567 mcfg.base, mcfg.base + mcfg.size - 1); in build_dsdt()
1585 for (i = 0; i < crs_range_set.io_ranges->len; i++) { in build_dsdt()
1590 0x0000, entry->base, entry->limit, in build_dsdt()
1591 0x0000, entry->limit - entry->base + 1)); in build_dsdt()
1602 for (i = 0; i < crs_range_set.mem_ranges->len; i++) { in build_dsdt()
1607 0, entry->base, entry->limit, in build_dsdt()
1608 0, entry->limit - entry->base + 1)); in build_dsdt()
1615 for (i = 0; i < crs_range_set.mem_64bit_ranges->len; i++) { in build_dsdt()
1621 0, entry->base, entry->limit, in build_dsdt()
1622 0, entry->limit - entry->base + 1)); in build_dsdt()
1644 pm->fadt.gpe0_blk.address, in build_dsdt()
1645 pm->fadt.gpe0_blk.address, in build_dsdt()
1647 pm->fadt.gpe0_blk.bit_width / 8) in build_dsdt()
1655 if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) { in build_dsdt()
1664 aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1, in build_dsdt()
1665 pm->pcihp_io_len) in build_dsdt()
1674 if (!pm->s3_disabled) { in build_dsdt()
1683 if (!pm->s4_disabled) { in build_dsdt()
1685 aml_append(pkg, aml_int(pm->s4_val)); /* PM1a_CNT.SLP_TYP */ in build_dsdt()
1687 aml_append(pkg, aml_int(pm->s4_val)); in build_dsdt()
1704 fw_cfg_add_acpi_dsdt(scope, x86ms->fw_cfg); in build_dsdt()
1713 PCIBus *pbus = PCI_HOST_BRIDGE(pci_host)->bus; in build_dsdt()
1744 if (pcms->sgx_epc.size != 0) { in build_dsdt()
1745 uint64_t epc_base = pcms->sgx_epc.base; in build_dsdt()
1746 uint64_t epc_size = pcms->sgx_epc.size; in build_dsdt()
1757 epc_base + epc_size - 1, 0, epc_size)); in build_dsdt()
1768 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { in build_dsdt()
1772 PCIBus *b = PCI_HOST_BRIDGE(pci_host)->bus; in build_dsdt()
1795 g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len); in build_dsdt()
1801 * IA-PC HPET (High Precision Event Timers) Specification (Revision: 1.0a)
1850 log_addr_offset = table_data->len; in build_tpm_tcpa()
1880 const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine); in build_srat()
1881 int nb_numa_nodes = machine->numa_state->num_nodes; in build_srat()
1882 NodeInfo *numa_info = machine->numa_state->nodes; in build_srat()
1883 AcpiTable table = { .sig = "SRAT", .rev = 1, .oem_id = x86ms->oem_id, in build_srat()
1884 .oem_table_id = x86ms->oem_table_id }; in build_srat()
1890 for (i = 0; i < apic_ids->len; i++) { in build_srat()
1891 int node_id = apic_ids->cpus[i].props.node_id; in build_srat()
1892 uint32_t apic_id = apic_ids->cpus[i].arch_id; in build_srat()
1901 /* Flags, Table 5-36 */ in build_srat()
1918 /* Flags, Table 5-39 */ in build_srat()
1926 * from 640k-1M and possibly another one from 3.5G-4G. in build_srat()
1929 numa_mem_start = table_data->len; in build_srat()
1933 mem_len = numa_info[i - 1].node_mem; in build_srat()
1939 mem_len -= next_base - HOLE_640K_START; in build_srat()
1941 build_srat_memory(table_data, mem_base, mem_len, i - 1, in build_srat()
1951 mem_len = next_base - HOLE_640K_END; in build_srat()
1955 if (mem_base <= x86ms->below_4g_mem_size && in build_srat()
1956 next_base > x86ms->below_4g_mem_size) { in build_srat()
1957 mem_len -= next_base - x86ms->below_4g_mem_size; in build_srat()
1959 build_srat_memory(table_data, mem_base, mem_len, i - 1, in build_srat()
1962 mem_base = x86ms->above_4g_mem_start; in build_srat()
1963 mem_len = next_base - x86ms->below_4g_mem_size; in build_srat()
1968 build_srat_memory(table_data, mem_base, mem_len, i - 1, in build_srat()
1973 if (machine->nvdimms_state->is_enabled) { in build_srat()
1985 slots = (table_data->len - numa_mem_start) / 40 /* mem affinity len */; in build_srat()
2000 if (machine->device_memory) { in build_srat()
2001 build_srat_memory(table_data, machine->device_memory->base, in build_srat()
2002 memory_region_size(&machine->device_memory->mr), in build_srat()
2003 nb_numa_nodes - 1, in build_srat()
2014 insert_scope(PCIBus *bus, PCIDevice *dev, void *opaque) in insert_scope() argument
2034 /* bus */ in insert_scope()
2035 build_append_int_noprefix(scope_blob, pci_bus_num(bus), 1); in insert_scope()
2037 build_append_int_noprefix(scope_blob, PCI_SLOT(dev->devfn), 1); in insert_scope()
2039 build_append_int_noprefix(scope_blob, PCI_FUNC(dev->devfn), 1); in insert_scope()
2049 PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; in dmar_host_bridges() local
2051 if (bus && !pci_bus_bypass_iommu(bus)) { in dmar_host_bridges()
2052 pci_for_each_device_under_bus(bus, insert_scope, scope_blob); in dmar_host_bridges()
2081 * A PCI bus walk, for each PCI host bridge. in build_dmar_q35()
2083 * is attached to a bus with iommu enabled. in build_dmar_q35()
2095 build_append_int_noprefix(table_data, intel_iommu->aw_bits - 1, 1); in build_dmar_q35()
2103 16 + ioapic_scope_size + scope_blob->len, 2); in build_dmar_q35()
2112 /* Scope definition for the root-complex IOAPIC. See VT-d spec in build_dmar_q35()
2119 /* Start Bus Number */ in build_dmar_q35()
2126 g_array_append_vals(table_data, scope_blob->data, scope_blob->len); in build_dmar_q35()
2129 if (iommu->dt_supported) { in build_dmar_q35()
2143 * (Version 1.0 - April 6, 2009)
2144 * Spec: http://download.microsoft.com/download/7/E/7/7E7662CF-CBEA-470B-A97E-CE7CE0D98DC2/WAET.docx
2157 * Set "ACPI PM timer good" flag. in build_waet()
2159 * Tells Windows guests that our ACPI PM timer is reliable in the in build_waet()
2161 * Which avoids costly VMExits caused by guest re-reading it unnecessarily. in build_waet()
2163 build_append_int_noprefix(table_data, 1 << 1 /* ACPI PM timer good */, 4); in build_waet()
2178 insert_ivhd(PCIBus *bus, PCIDevice *dev, void *opaque) in insert_ivhd() argument
2184 entry = PCI_BUILD_BDF(pci_bus_num(bus), dev->devfn) << 8 | 0x2; in insert_ivhd()
2190 uint8_t sub = dev->config[PCI_SUBORDINATE_BUS]; in insert_ivhd()
2194 * Walk the bus if there are subordinates, otherwise use a range in insert_ivhd()
2195 * to cover an entire leaf bus. We could potentially also use a in insert_ivhd()
2201 * root ports without a slot (ie. built-ins) and Range entries in insert_ivhd()
2202 * when there is a slot. The same system also only hard-codes in insert_ivhd()
2203 * the alias range for an onboard PCIe-to-PCI bridge, apparently in insert_ivhd()
2207 if (sec == sub) { /* leaf bus */ in insert_ivhd()
2219 * If the secondary bus is conventional, then we need to create an in insert_ivhd()
2221 * first devfn on the secondary bus to the last devfn on the in insert_ivhd()
2222 * subordinate bus. The alias target depends on legacy versus in insert_ivhd()
2234 dev_id_b = PCI_BUILD_BDF(pci_bus_num(bus), dev->devfn); in insert_ivhd()
2255 PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; in ivrs_host_bridges() local
2257 if (bus && !pci_bus_bypass_iommu(bus)) { in ivrs_host_bridges()
2258 pci_for_each_device_under_bus(bus, insert_ivhd, ivhd_blob); in ivrs_host_bridges()
2276 /* IVinfo - IO virtualization information common to all in build_amd_iommu()
2287 * A PCI bus walk, for each PCI host bridge, is necessary to create a in build_amd_iommu()
2296 if (!ivhd_blob->len) { in build_amd_iommu()
2299 * These are 4-byte device entries currently reporting the range of in build_amd_iommu()
2300 * Refer to Spec - Table 95:IVHD Device Entry Type Codes(4-byte) in build_amd_iommu()
2307 * for type IO-APIC in build_amd_iommu()
2308 * Refer to spec - Table 95: IVHD device entry type codes in build_amd_iommu()
2310 * Linux IOMMU driver checks for the special IVHD device (type IO-APIC). in build_amd_iommu()
2321 /* IVHD definition - type 10h */ in build_amd_iommu()
2332 build_append_int_noprefix(table_data, ivhd_blob->len + 24, 2); in build_amd_iommu()
2335 object_property_get_int(OBJECT(&s->pci), "addr", in build_amd_iommu()
2338 build_append_int_noprefix(table_data, s->pci.capab_offset, 2); in build_amd_iommu()
2340 build_append_int_noprefix(table_data, s->mr_mmio.addr, 8); in build_amd_iommu()
2350 if (s->xtsup) { in build_amd_iommu()
2356 g_array_append_vals(table_data, ivhd_blob->data, ivhd_blob->len); in build_amd_iommu()
2358 /* IVHD definition - type 11h */ in build_amd_iommu()
2367 build_append_int_noprefix(table_data, ivhd_blob->len + 40, 2); in build_amd_iommu()
2370 object_property_get_int(OBJECT(&s->pci), "addr", in build_amd_iommu()
2373 build_append_int_noprefix(table_data, s->pci.capab_offset, 2); in build_amd_iommu()
2375 build_append_int_noprefix(table_data, s->mr_mmio.addr, 8); in build_amd_iommu()
2390 g_array_append_vals(table_data, ivhd_blob->data, ivhd_blob->len); in build_amd_iommu()
2420 mcfg->base = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_mcfg()
2422 if (mcfg->base == PCIE_BASE_ADDR_UNMAPPED) { in acpi_get_mcfg()
2428 mcfg->size = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_mcfg()
2438 DeviceState *iommu = pcms->iommu; in acpi_build()
2441 AcpiPmInfo pm; in acpi_build() local
2446 GArray *tables_blob = tables->table_data; in acpi_build()
2452 acpi_get_pm_info(machine, &pm); in acpi_build()
2460 oem_id = x86ms->oem_id; in acpi_build()
2466 oem_table_id = x86ms->oem_table_id; in acpi_build()
2473 bios_linker_loader_alloc(tables->linker, in acpi_build()
2483 facs = tables_blob->len; in acpi_build()
2487 dsdt = tables_blob->len; in acpi_build()
2488 build_dsdt(tables_blob, tables->linker, &pm, &misc, in acpi_build()
2493 pm.fadt.facs_tbl_offset = &facs; in acpi_build()
2494 pm.fadt.dsdt_tbl_offset = &dsdt; in acpi_build()
2495 pm.fadt.xdsdt_tbl_offset = &dsdt; in acpi_build()
2496 build_fadt(tables_blob, tables->linker, &pm.fadt, oem_id, oem_table_id); in acpi_build()
2499 acpi_build_madt(tables_blob, tables->linker, x86ms, in acpi_build()
2500 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2508 build_erst(tables_blob, tables->linker, erst_dev, in acpi_build()
2509 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2518 tables->vmgenid, tables->linker, x86ms->oem_id); in acpi_build()
2523 build_hpet(tables_blob, tables->linker, x86ms->oem_id, in acpi_build()
2524 x86ms->oem_table_id); in acpi_build()
2530 build_tpm_tcpa(tables_blob, tables->linker, tables->tcpalog, in acpi_build()
2531 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2534 build_tpm2(tables_blob, tables->linker, tables->tcpalog, in acpi_build()
2535 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2539 if (machine->numa_state->num_nodes) { in acpi_build()
2541 build_srat(tables_blob, tables->linker, machine); in acpi_build()
2542 if (machine->numa_state->have_numa_distance) { in acpi_build()
2544 build_slit(tables_blob, tables->linker, machine, x86ms->oem_id, in acpi_build()
2545 x86ms->oem_table_id); in acpi_build()
2547 if (machine->numa_state->hmat_enabled) { in acpi_build()
2549 build_hmat(tables_blob, tables->linker, machine->numa_state, in acpi_build()
2550 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2555 build_mcfg(tables_blob, tables->linker, &mcfg, x86ms->oem_id, in acpi_build()
2556 x86ms->oem_table_id); in acpi_build()
2560 build_amd_iommu(tables_blob, tables->linker, x86ms->oem_id, in acpi_build()
2561 x86ms->oem_table_id); in acpi_build()
2564 build_dmar_q35(tables_blob, tables->linker, x86ms->oem_id, in acpi_build()
2565 x86ms->oem_table_id); in acpi_build()
2570 build_viot(machine, tables_blob, tables->linker, pci_get_bdf(pdev), in acpi_build()
2571 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2573 if (machine->nvdimms_state->is_enabled) { in acpi_build()
2574 nvdimm_build_acpi(table_offsets, tables_blob, tables->linker, in acpi_build()
2575 machine->nvdimms_state, machine->ram_slots, in acpi_build()
2576 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2578 if (pcms->cxl_devices_state.is_enabled) { in acpi_build()
2579 cxl_build_cedt(table_offsets, tables_blob, tables->linker, in acpi_build()
2580 x86ms->oem_id, x86ms->oem_table_id, &pcms->cxl_devices_state); in acpi_build()
2584 build_waet(tables_blob, tables->linker, x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2595 rsdt = tables_blob->len; in acpi_build()
2596 build_rsdt(tables_blob, tables->linker, table_offsets, in acpi_build()
2603 .oem_id = x86ms->oem_id, in acpi_build()
2607 build_rsdp(tables->rsdp, tables->linker, &rsdp_data); in acpi_build()
2621 acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE); in acpi_build()
2633 /* Make sure RAM size is correct - in case it got changed e.g. by migration */ in acpi_ram_update()
2636 memcpy(memory_region_get_ram_ptr(mr), data->data, size); in acpi_ram_update()
2646 if (!build_state || build_state->patched) { in acpi_build_update()
2649 build_state->patched = 1; in acpi_build_update()
2655 acpi_ram_update(build_state->table_mr, tables.table_data); in acpi_build_update()
2657 acpi_ram_update(build_state->rsdp_mr, tables.rsdp); in acpi_build_update()
2659 acpi_ram_update(build_state->linker_mr, tables.linker->cmd_blob); in acpi_build_update()
2666 build_state->patched = 0; in acpi_build_reset()
2691 if (!x86ms->fw_cfg) { in acpi_setup()
2696 if (!pcms->acpi_build_enabled) { in acpi_setup()
2712 build_state->table_mr = acpi_add_rom_blob(acpi_build_update, in acpi_setup()
2715 assert(build_state->table_mr != NULL); in acpi_setup()
2717 build_state->linker_mr = in acpi_setup()
2719 tables.linker->cmd_blob, ACPI_BUILD_LOADER_FILE); in acpi_setup()
2722 fw_cfg_add_file(x86ms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, in acpi_setup()
2723 tables.tcpalog->data, acpi_data_len(tables.tcpalog)); in acpi_setup()
2732 fw_cfg_add_file(x86ms->fw_cfg, "etc/tpm/config", in acpi_setup()
2739 vmgenid_add_fw_cfg(VMGENID(vmgenid_dev), x86ms->fw_cfg, in acpi_setup()
2743 build_state->rsdp_mr = acpi_add_rom_blob(acpi_build_update, in acpi_setup()