Lines Matching +full:0 +full:x0000001
87 #define ACPI_BUILD_ALIGN_SIZE 0x1000
89 #define ACPI_BUILD_TABLE_SIZE 0x20000
94 do {printf("ACPI_BUILD: " fmt, ## __VA_ARGS__); } while (0)
160 (1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL) : 0), in init_common_fadt_data()
163 .plvl2_lat = 0xfff /* C2 state not supported */, in init_common_fadt_data()
164 .plvl3_lat = 0xfff /* C3 state not supported */, in init_common_fadt_data()
165 .smi_cmd = smm_enabled ? ACPI_PORT_SMI_CMD : 0, in init_common_fadt_data()
170 0, in init_common_fadt_data()
174 0, in init_common_fadt_data()
177 .address = io + 0x04 }, in init_common_fadt_data()
178 .pm_tmr = { .space_id = as, .bit_width = 4 * 8, .address = io + 0x08 }, in init_common_fadt_data()
200 pm->cpu_hp_io_base = 0; in acpi_get_pm_info()
201 pm->pcihp_io_base = 0; in acpi_get_pm_info()
202 pm->pcihp_io_len = 0; in acpi_get_pm_info()
219 pm->fadt.reset_val = 0xf; in acpi_get_pm_info()
333 build_append_int_noprefix(table_data, 0, 4); /* Hardware Signature */ in build_facs()
334 build_append_int_noprefix(table_data, 0, 4); /* Firmware Waking Vector */ in build_facs()
335 build_append_int_noprefix(table_data, 0, 4); /* Global Lock */ in build_facs()
336 build_append_int_noprefix(table_data, 0, 4); /* Flags */ in build_facs()
346 Aml *params = aml_local(0); in aml_pci_device_dsm()
348 aml_append(pkg, aml_int(0)); in aml_pci_device_dsm()
349 aml_append(pkg, aml_int(0)); in aml_pci_device_dsm()
352 aml_store(aml_name("BSEL"), aml_index(params, aml_int(0)))); in aml_pci_device_dsm()
356 aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1), in aml_pci_device_dsm()
366 uint8_t byte_list[1] = { 0 }; /* nothing supported yet */ in build_append_pci_dsm_func0_common()
374 ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID))); in build_append_pci_dsm_func0_common()
392 Aml *zero = aml_int(0); in aml_pci_edsm()
394 Aml *ret = aml_local(0); in aml_pci_edsm()
433 aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx)); in aml_pci_edsm()
446 g_assert(pdev->acpi_index != 0); in aml_pci_static_endpoint_dsm()
449 Aml *params = aml_local(0); in aml_pci_static_endpoint_dsm()
454 aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1), in aml_pci_static_endpoint_dsm()
464 int32_t devfn = PCI_DEVFN(slot, 0); in build_append_pcihp_notify_entry()
466 if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL)); in build_append_pcihp_notify_entry()
478 * Ignore only hotplugged PCI bridges on !0 functions, but in is_devfn_ignored_generic()
500 * so generate device description only for function 0 in is_devfn_ignored_hotplug()
503 (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) { in is_devfn_ignored_hotplug()
522 for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { in build_append_pcihp_slots()
565 for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { in build_append_pci_bus_devices()
597 int nr_notifiers = 0; in build_append_notfication_callback()
623 method = aml_method("PCNT", 0, AML_NOTSERIALIZED); in build_append_notfication_callback()
652 Aml *ret = aml_local(0); in aml_pci_pdsm()
655 Aml *zero = aml_int(0); in aml_pci_pdsm()
657 Aml *not_supp = aml_int(0xFFFFFFFF); in aml_pci_pdsm()
660 Aml *bnum = aml_derefof(aml_index(params, aml_int(0))); in aml_pci_pdsm()
676 * 0: not present (default value) in aml_pci_pdsm()
755 method = aml_method("_PRT", 0, AML_NOTSERIALIZED); in build_prt()
759 for (pin = 0; pin < nroutes; pin++) { in build_prt()
763 aml_append(pkg, aml_int((slot << 16) | 0xFFFF)); in build_prt()
773 aml_append(pkg, aml_int(0)); in build_prt()
790 Aml *zero = aml_int(0); in build_hpet_aml()
791 Aml *id = aml_local(0); in build_hpet_aml()
805 method = aml_method("_STA", 0, AML_NOTSERIALIZED); in build_hpet_aml()
810 aml_equal(id, aml_int(0xffff)))); in build_hpet_aml()
823 aml_append(method, aml_return(aml_int(0x0F))); in build_hpet_aml()
841 aml_append(dev, aml_name_decl("STA", aml_int(0xF))); in build_vmbus_device_aml()
843 aml_append(dev, aml_name_decl("_UID", aml_int(0x0))); in build_vmbus_device_aml()
846 method = aml_method("_DIS", 0, AML_NOTSERIALIZED); in build_vmbus_device_aml()
847 aml_append(method, aml_store(aml_and(aml_name("STA"), aml_int(0xD), NULL), in build_vmbus_device_aml()
851 method = aml_method("_PS0", 0, AML_NOTSERIALIZED); in build_vmbus_device_aml()
852 aml_append(method, aml_store(aml_or(aml_name("STA"), aml_int(0xF), NULL), in build_vmbus_device_aml()
856 method = aml_method("_STA", 0, AML_NOTSERIALIZED); in build_vmbus_device_aml()
860 aml_append(dev, aml_name_decl("_PS3", aml_int(0x0))); in build_vmbus_device_aml()
875 Aml *buf = aml_local(0); in build_dbg_aml()
880 aml_operation_region("DBG", AML_SYSTEM_IO, aml_int(0x0402), 0x01)); in build_dbg_aml()
887 aml_append(method, aml_to_hexstring(aml_arg(0), buf)); in build_dbg_aml()
890 aml_append(method, aml_store(aml_int(0), idx)); in build_dbg_aml()
898 aml_append(method, aml_store(aml_int(0x0A), aml_name("DBGB"))); in build_dbg_aml()
920 method = aml_method("_STA", 0, AML_NOTSERIALIZED); in build_link_dev()
924 method = aml_method("_DIS", 0, AML_NOTSERIALIZED); in build_link_dev()
925 aml_append(method, aml_or(reg, aml_int(0x80), reg)); in build_link_dev()
928 method = aml_method("_CRS", 0, AML_NOTSERIALIZED); in build_link_dev()
933 aml_append(method, aml_create_dword_field(aml_arg(0), aml_int(5), "PRRI")); in build_link_dev()
962 method = aml_method("_DIS", 0, AML_NOTSERIALIZED); in build_gsi_link_dev()
979 irqs = 0; in build_iqcr_method()
988 if_ctx = aml_if(aml_lless(aml_arg(0), aml_int(0x80))); in build_iqcr_method()
989 aml_append(if_ctx, aml_store(aml_arg(0), aml_name("PRRI"))); in build_iqcr_method()
993 aml_store(aml_and(aml_arg(0), aml_int(0xF), NULL), in build_iqcr_method()
1007 if_ctx = aml_if(aml_and(aml_int(0x80), aml_arg(0), NULL)); in build_irq_status_method()
1008 aml_append(if_ctx, aml_return(aml_int(0x09))); in build_irq_status_method()
1010 aml_append(method, aml_return(aml_int(0x0B))); in build_irq_status_method()
1029 aml_append(sb_scope, build_link_dev("LNKA", 0, aml_name("PRQ0"))); in build_piix4_pci0_int()
1050 method = aml_method("_STA", 0, AML_NOTSERIALIZED); in build_piix4_pci0_int()
1051 aml_append(method, aml_return(aml_int(0x0b))); in build_piix4_pci0_int()
1054 method = aml_method("_DIS", 0, AML_NOTSERIALIZED); in build_piix4_pci0_int()
1057 method = aml_method("_CRS", 0, AML_NOTSERIALIZED); in build_piix4_pci0_int()
1076 Aml *a_nr = aml_int((nr << 16) | 0xffff); in append_q35_prt_entry()
1081 for (i = 0; i < 4; i++) { in append_q35_prt_entry()
1090 aml_append(pkg, aml_int(0)); in append_q35_prt_entry()
1103 for (i = 0; i < 0x18; i++) { in build_q35_routing_table()
1104 name[3] = 'E' + (i & 0x3); in build_q35_routing_table()
1109 append_q35_prt_entry(pkg, 0x18, name); in build_q35_routing_table()
1112 for (i = 0x0019; i < 0x1e; i++) { in build_q35_routing_table()
1119 append_q35_prt_entry(pkg, 0x1e, name); in build_q35_routing_table()
1121 append_q35_prt_entry(pkg, 0x1f, name); in build_q35_routing_table()
1134 aml_append(table, aml_name_decl("PICF", aml_int(0))); in build_q35_pci0_int()
1137 aml_append(method, aml_store(aml_arg(0), aml_name("PICF"))); in build_q35_pci0_int()
1146 method = aml_method("_PRT", 0, AML_NOTSERIALIZED); in build_q35_pci0_int()
1155 if_ctx = aml_if(aml_equal(aml_name("PICF"), aml_int(0))); in build_q35_pci0_int()
1168 aml_append(sb_scope, build_link_dev("LNKA", 0, aml_name("PRQA"))); in build_q35_pci0_int()
1177 aml_append(sb_scope, build_gsi_link_dev("GSIA", 0x10, 0x10)); in build_q35_pci0_int()
1178 aml_append(sb_scope, build_gsi_link_dev("GSIB", 0x11, 0x11)); in build_q35_pci0_int()
1179 aml_append(sb_scope, build_gsi_link_dev("GSIC", 0x12, 0x12)); in build_q35_pci0_int()
1180 aml_append(sb_scope, build_gsi_link_dev("GSID", 0x13, 0x13)); in build_q35_pci0_int()
1181 aml_append(sb_scope, build_gsi_link_dev("GSIE", 0x14, 0x14)); in build_q35_pci0_int()
1182 aml_append(sb_scope, build_gsi_link_dev("GSIF", 0x15, 0x15)); in build_q35_pci0_int()
1183 aml_append(sb_scope, build_gsi_link_dev("GSIG", 0x16, 0x16)); in build_q35_pci0_int()
1184 aml_append(sb_scope, build_gsi_link_dev("GSIH", 0x17, 0x17)); in build_q35_pci0_int()
1206 0x0000000000000000, in build_q35_dram_controller()
1209 0x0000000000000000, in build_q35_dram_controller()
1218 0x0000000000000000, in build_q35_dram_controller()
1221 0x0000000000000000, in build_q35_dram_controller()
1238 aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08)); in build_x86_acpi_pci_hotplug()
1246 aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04)); in build_x86_acpi_pci_hotplug()
1253 aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08)); in build_x86_acpi_pci_hotplug()
1259 aml_append(scope, aml_mutex("BLCK", 0)); in build_x86_acpi_pci_hotplug()
1262 aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); in build_x86_acpi_pci_hotplug()
1263 aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); in build_x86_acpi_pci_hotplug()
1267 aml_append(method, aml_return(aml_int(0))); in build_x86_acpi_pci_hotplug()
1271 aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF)); in build_x86_acpi_pci_hotplug()
1272 aml_append(method, aml_store(aml_arg(0), aml_name("BNUM"))); in build_x86_acpi_pci_hotplug()
1275 aml_append(method, aml_store(aml_name("PIDX"), aml_local(0))); in build_x86_acpi_pci_hotplug()
1277 aml_append(method, aml_return(aml_local(0))); in build_x86_acpi_pci_hotplug()
1292 Aml *a_ctrl = aml_local(0); in build_q35_osc_method()
1295 aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1")); in build_q35_osc_method()
1298 aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"))); in build_q35_osc_method()
1310 aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl)); in build_q35_osc_method()
1314 aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1)); in build_q35_osc_method()
1319 aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1)); in build_q35_osc_method()
1343 method = aml_method("_STA", 0, AML_NOTSERIALIZED); in build_acpi0017()
1344 aml_append(method, aml_return(aml_int(0x0B))); in build_acpi0017()
1369 int root_bus_limit = 0xFF; in build_dsdt()
1413 /* reserve SMI block resources, IO ports 0xB2, 0xB3 */ in build_dsdt()
1459 method = aml_method("_E04", 0, AML_NOTSERIALIZED); in build_dsdt()
1461 aml_int(0x80))); in build_dsdt()
1538 0, 0, 0, 0); in build_dsdt()
1575 0x0000, 0x0, root_bus_limit, in build_dsdt()
1576 0x0000, root_bus_limit + 1)); in build_dsdt()
1577 aml_append(crs, aml_io(AML_DECODE16, 0x0CF8, 0x0CF8, 0x01, 0x08)); in build_dsdt()
1582 0x0000, 0x0000, 0x0CF7, 0x0000, 0x0CF8)); in build_dsdt()
1584 crs_replace_with_free_ranges(crs_range_set.io_ranges, 0x0D00, 0xFFFF); in build_dsdt()
1585 for (i = 0; i < crs_range_set.io_ranges->len; i++) { in build_dsdt()
1590 0x0000, entry->base, entry->limit, in build_dsdt()
1591 0x0000, entry->limit - entry->base + 1)); in build_dsdt()
1597 0, 0x000A0000, 0x000BFFFF, 0, 0x00020000)); in build_dsdt()
1602 for (i = 0; i < crs_range_set.mem_ranges->len; i++) { in build_dsdt()
1607 0, entry->base, entry->limit, in build_dsdt()
1608 0, entry->limit - entry->base + 1)); in build_dsdt()
1615 for (i = 0; i < crs_range_set.mem_64bit_ranges->len; i++) { in build_dsdt()
1621 0, entry->base, entry->limit, in build_dsdt()
1622 0, entry->limit - entry->base + 1)); in build_dsdt()
1639 aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); in build_dsdt()
1661 aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); in build_dsdt()
1678 aml_append(pkg, aml_int(0)); /* reserved */ in build_dsdt()
1679 aml_append(pkg, aml_int(0)); /* reserved */ in build_dsdt()
1688 aml_append(pkg, aml_int(0)); /* reserved */ in build_dsdt()
1689 aml_append(pkg, aml_int(0)); /* reserved */ in build_dsdt()
1694 aml_append(pkg, aml_int(0)); /* PM1a_CNT.SLP_TYP */ in build_dsdt()
1695 aml_append(pkg, aml_int(0)); /* PM1b_CNT.SLP_TYP not impl. */ in build_dsdt()
1696 aml_append(pkg, aml_int(0)); /* reserved */ in build_dsdt()
1697 aml_append(pkg, aml_int(0)); /* reserved */ in build_dsdt()
1735 aml_append(dev, aml_name_decl("_STA", aml_int(0xf))); in build_dsdt()
1744 if (pcms->sgx_epc.size != 0) { in build_dsdt()
1756 AML_READ_WRITE, 0, epc_base, in build_dsdt()
1757 epc_base + epc_size - 1, 0, epc_size)); in build_dsdt()
1760 method = aml_method("_STA", 0, AML_NOTSERIALIZED); in build_dsdt()
1761 aml_append(method, aml_return(aml_int(0x0f))); in build_dsdt()
1782 method = aml_method("_E01", 0, AML_NOTSERIALIZED); in build_dsdt()
1785 aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF)); in build_dsdt()
1816 build_append_int_noprefix(table_data, 0x8086a201, 4); in build_hpet()
1818 build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 0, 0, 0, HPET_BASE); in build_hpet()
1820 build_append_int_noprefix(table_data, 0, 1); in build_hpet()
1822 build_append_int_noprefix(table_data, 0, 2); in build_hpet()
1824 build_append_int_noprefix(table_data, 0, 1); in build_hpet()
1851 build_append_int_noprefix(table_data, 0, 8); in build_tpm_tcpa()
1859 log_addr_offset, 8, ACPI_BUILD_TPMLOG_FILE, 0); in build_tpm_tcpa()
1888 build_append_int_noprefix(table_data, 0, 8); /* Reserved */ in build_srat()
1890 for (i = 0; i < apic_ids->len; i++) { in build_srat()
1896 build_append_int_noprefix(table_data, 0, 1); /* Type */ in build_srat()
1898 /* Proximity Domain [7:0] */ in build_srat()
1903 build_append_int_noprefix(table_data, 0, 1); /* Local SAPIC EID */ in build_srat()
1905 build_append_int_noprefix(table_data, 0, 3); in build_srat()
1906 build_append_int_noprefix(table_data, 0, 4); /* Reserved */ in build_srat()
1914 build_append_int_noprefix(table_data, 0, 2); /* Reserved */ in build_srat()
1920 build_append_int_noprefix(table_data, 0, 4); /* Clock Domain */ in build_srat()
1921 build_append_int_noprefix(table_data, 0, 4); /* Reserved */ in build_srat()
1928 next_base = 0; in build_srat()
1940 if (mem_len > 0) { in build_srat()
1958 if (mem_len > 0) { in build_srat()
1967 if (mem_len > 0) { in build_srat()
1987 build_srat_memory(table_data, 0, 0, 0, MEM_AFFINITY_NOFLAGS); in build_srat()
2021 /* Dmar Scope Type: 0x02 for PCI Bridge */ in insert_scope()
2022 build_append_int_noprefix(scope_blob, 0x02, 1); in insert_scope()
2024 /* Dmar Scope Type: 0x01 for PCI Endpoint Device */ in insert_scope()
2025 build_append_int_noprefix(scope_blob, 0x01, 1); in insert_scope()
2031 build_append_int_noprefix(scope_blob, 0, 2); in insert_scope()
2033 build_append_int_noprefix(scope_blob, 0, 1); in insert_scope()
2056 return 0; in dmar_host_bridges()
2068 uint8_t dmar_flags = 0; in build_dmar_q35()
2090 dmar_flags |= 0x1; /* Flags: 0x1: INT_REMAP */ in build_dmar_q35()
2100 build_append_int_noprefix(table_data, 0, 2); /* Type */ in build_dmar_q35()
2105 build_append_int_noprefix(table_data, 0 /* Don't include all pci device */ , in build_dmar_q35()
2107 build_append_int_noprefix(table_data, 0 , 1); /* Reserved */ in build_dmar_q35()
2108 build_append_int_noprefix(table_data, 0 , 2); /* Segment Number */ in build_dmar_q35()
2114 build_append_int_noprefix(table_data, 0x03 /* IOAPIC */, 1); /* Type */ in build_dmar_q35()
2116 build_append_int_noprefix(table_data, 0, 2); /* Reserved */ in build_dmar_q35()
2134 build_append_int_noprefix(table_data, 0, 1); /* Reserved */ in build_dmar_q35()
2135 build_append_int_noprefix(table_data, 0, 2); /* Segment Number */ in build_dmar_q35()
2171 #define IOAPIC_SB_DEVID (uint64_t)PCI_BUILD_BDF(0, PCI_DEVFN(0x14, 0))
2183 /* "Select" IVHD entry, type 0x2 */ in insert_ivhd()
2184 entry = PCI_BUILD_BDF(pci_bus_num(bus), dev->devfn) << 8 | 0x2; in insert_ivhd()
2208 /* "Start of Range" IVHD entry, type 0x3 */ in insert_ivhd()
2209 entry = PCI_BUILD_BDF(sec, PCI_DEVFN(0, 0)) << 8 | 0x3; in insert_ivhd()
2211 /* "End of Range" IVHD entry, type 0x4 */ in insert_ivhd()
2212 entry = PCI_BUILD_BDF(sub, PCI_DEVFN(31, 7)) << 8 | 0x4; in insert_ivhd()
2228 dev_id_a = PCI_BUILD_BDF(sec, PCI_DEVFN(0, 0)); in insert_ivhd()
2237 /* "Alias Start of Range" IVHD entry, type 0x43, 8 bytes */ in insert_ivhd()
2238 build_append_int_noprefix(table_data, dev_id_a << 8 | 0x43, 4); in insert_ivhd()
2239 build_append_int_noprefix(table_data, dev_id_b << 8 | 0x0, 4); in insert_ivhd()
2241 /* "End of Range" IVHD entry, type 0x4 */ in insert_ivhd()
2242 entry = PCI_BUILD_BDF(sub, PCI_DEVFN(31, 7)) << 8 | 0x4; in insert_ivhd()
2262 return 0; in ivrs_host_bridges()
2280 (1UL << 0) | /* EFRSup */ in build_amd_iommu()
2284 build_append_int_noprefix(table_data, 0, 8); in build_amd_iommu()
2302 build_append_int_noprefix(ivhd_blob, 0x0000001, 4); in build_amd_iommu()
2315 (0x1ull << 56) | /* type IOAPIC */ in build_amd_iommu()
2317 0x48, /* special device */ in build_amd_iommu()
2322 build_append_int_noprefix(table_data, 0x10, 1); in build_amd_iommu()
2325 (1UL << 0) | /* HtTunEn */ in build_amd_iommu()
2342 build_append_int_noprefix(table_data, 0, 2); in build_amd_iommu()
2344 build_append_int_noprefix(table_data, 0, 2); in build_amd_iommu()
2351 feature_report |= (1UL << 0); /* XTSup */ in build_amd_iommu()
2359 build_append_int_noprefix(table_data, 0x11, 1); in build_amd_iommu()
2362 (1UL << 0) | /* HtTunEn */ in build_amd_iommu()
2377 build_append_int_noprefix(table_data, 0, 2); in build_amd_iommu()
2379 build_append_int_noprefix(table_data, 0, 2); in build_amd_iommu()
2381 build_append_int_noprefix(table_data, 0, 4); in build_amd_iommu()
2387 build_append_int_noprefix(table_data, 0, 8); in build_amd_iommu()
2602 .revision = 0, in acpi_build()
2637 memory_region_set_dirty(mr, 0, size); in acpi_ram_update()
2666 build_state->patched = 0; in acpi_build_reset()
2749 vmstate_register(NULL, 0, &vmstate_acpi_build, build_state); in acpi_setup()