1059     uint32_t group_value = 0;  in aspeed_gpio_2700_write_control_reg()  local
1075     group_value = set->direction;  in aspeed_gpio_2700_write_control_reg()
1076     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1090     group_value = (group_value | ~props->input) & props->output;  in aspeed_gpio_2700_write_control_reg()
1092                                                  group_value);  in aspeed_gpio_2700_write_control_reg()
1095     group_value = set->data_read;  in aspeed_gpio_2700_write_control_reg()
1096     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1098     group_value &= props->output;  in aspeed_gpio_2700_write_control_reg()
1099     group_value = update_value_control_source(set, set->data_read,  in aspeed_gpio_2700_write_control_reg()
1100                                               group_value);  in aspeed_gpio_2700_write_control_reg()
1101     set->data_read = group_value;  in aspeed_gpio_2700_write_control_reg()
1104     group_value = set->int_enable;  in aspeed_gpio_2700_write_control_reg()
1105     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1108                                                   group_value);  in aspeed_gpio_2700_write_control_reg()
1111     group_value = set->int_sens_0;  in aspeed_gpio_2700_write_control_reg()
1112     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1115                                                   group_value);  in aspeed_gpio_2700_write_control_reg()
1118     group_value = set->int_sens_1;  in aspeed_gpio_2700_write_control_reg()
1119     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1122                                                   group_value);  in aspeed_gpio_2700_write_control_reg()
1125     group_value = set->int_sens_2;  in aspeed_gpio_2700_write_control_reg()
1126     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1129                                                   group_value);  in aspeed_gpio_2700_write_control_reg()
1132     group_value = set->reset_tol;  in aspeed_gpio_2700_write_control_reg()
1133     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1136                                                  group_value);  in aspeed_gpio_2700_write_control_reg()
1139     group_value = set->debounce_1;  in aspeed_gpio_2700_write_control_reg()
1140     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1143                                                   group_value);  in aspeed_gpio_2700_write_control_reg()
1146     group_value = set->debounce_2;  in aspeed_gpio_2700_write_control_reg()
1147     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1150                                                   group_value);  in aspeed_gpio_2700_write_control_reg()
1153     group_value = set->input_mask;  in aspeed_gpio_2700_write_control_reg()
1154     group_value = deposit32(group_value, pin_idx, 1,  in aspeed_gpio_2700_write_control_reg()
1161     set->input_mask = group_value & props->input;  in aspeed_gpio_2700_write_control_reg()