hw/dma/xlnx-zynq-devcfg.c

46         qemu_log("%s: " fmt, __func__, ## args); \
136 static void xlnx_zynq_devcfg_update_ixr(XlnxZynqDevcfg *s)
138     qemu_set_irq(s->irq, ~s->regs[R_INT_MASK] & s->regs[R_INT_STS]);
143     XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(dev);
147         register_reset(&s->regs_info[i]);
151 static void xlnx_zynq_devcfg_dma_go(XlnxZynqDevcfg *s)
155         XlnxZynqDevcfgDMACmd *dmah = s->dma_cmd_fifo;
157         bool loopback = s->regs[R_MCTRL] & R_MCTRL_INT_PCAP_LPBK_MASK;
177             s->regs[R_INT_STS] |= R_INT_STS_DMA_DONE_MASK |
179             s->dma_cmd_fifo_num--;
180             memmove(s->dma_cmd_fifo, &s->dma_cmd_fifo[1],
181                     sizeof(s->dma_cmd_fifo) - sizeof(s->dma_cmd_fifo[0]));
183         xlnx_zynq_devcfg_update_ixr(s);
184     } while (s->dma_cmd_fifo_num);
189     XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(reg->opaque);
191     xlnx_zynq_devcfg_update_ixr(s);
196     XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(reg->opaque);
200         if (s->regs[R_LOCK] & 1 << i) {
202             val |= lock_ctrl_map[i] & s->regs[R_CTRL];
214         qemu_log_mask(LOG_UNIMP, "%s: warning, aes-en bits inconsistent,"
222     XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(reg->opaque);
223     const char *device_prefix = object_get_typename(OBJECT(s));
227         s->regs[R_CTRL] |= R_CTRL_PCAP_PR_MASK;
228         s->regs[R_CTRL] |= R_CTRL_PCFG_AES_EN_MASK;
229         memory_region_set_enabled(&s->iomem, true);
231         qemu_log_mask(LOG_GUEST_ERROR, "%s: failed unlock\n", device_prefix);
232         s->regs[R_CTRL] &= ~R_CTRL_PCAP_PR_MASK;
233         s->regs[R_CTRL] &= ~R_CTRL_PCFG_AES_EN_MASK;
235         memory_region_set_enabled(&s->iomem, false);
241     XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(reg->opaque);
244     return s->regs[R_LOCK] | val;
249     XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(reg->opaque);
251     s->dma_cmd_fifo[s->dma_cmd_fifo_num] = (XlnxZynqDevcfgDMACmd) {
252             .src_addr = s->regs[R_DMA_SRC_ADDR] & ~0x3UL,
253             .dest_addr = s->regs[R_DMA_DST_ADDR] & ~0x3UL,
254             .src_len = s->regs[R_DMA_SRC_LEN] << 2,
255             .dest_len = s->regs[R_DMA_DST_LEN] << 2,
257     s->dma_cmd_fifo_num++;
259              s->dma_cmd_fifo_num);
260     xlnx_zynq_devcfg_dma_go(s);
363     XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(obj);
366     sysbus_init_irq(sbd, &s->irq);
368     memory_region_init(&s->iomem, obj, "devcfg", XLNX_ZYNQ_DEVCFG_R_MAX * 4);
372                               s->regs_info, s->regs,
376     memory_region_add_subregion(&s->iomem,
380     sysbus_init_mmio(sbd, &s->iomem);