32     uint32_t cmd;  member
170     s->chan[ch].cmd = desc[DCMD];  in pxa2xx_dma_descriptor_fetch()
172     if (s->chan[ch].cmd & DCMD_FLOWSRC)  in pxa2xx_dma_descriptor_fetch()
174     if (s->chan[ch].cmd & DCMD_FLOWTRG)  in pxa2xx_dma_descriptor_fetch()
177     if (s->chan[ch].cmd & (DCMD_CMPEN | DCMD_FLYBYS | DCMD_FLYBYT))  in pxa2xx_dma_descriptor_fetch()
180     if (s->chan[ch].cmd & DCMD_STARTIRQEN)  in pxa2xx_dma_descriptor_fetch()
203                 if ((ch->cmd & (DCMD_FLOWSRC | DCMD_FLOWTRG)) && !ch->request)  in pxa2xx_dma_run()
206                 length = ch->cmd & DCMD_LEN;  in pxa2xx_dma_run()
207                 size = DCMD_SIZE(ch->cmd);  in pxa2xx_dma_run()
208                 width = DCMD_WIDTH(ch->cmd);  in pxa2xx_dma_run()
210                 srcinc = (ch->cmd & DCMD_INCSRCADDR) ? width : 0;  in pxa2xx_dma_run()
211                 destinc = (ch->cmd & DCMD_INCTRGADDR) ? width : 0;  in pxa2xx_dma_run()
228                     if ((ch->cmd & (DCMD_FLOWSRC | DCMD_FLOWTRG)) &&  in pxa2xx_dma_run()
240                 ch->cmd = (ch->cmd & ~DCMD_LEN) | length;  in pxa2xx_dma_run()
244                     if (ch->cmd & DCMD_ENDIRQEN)  in pxa2xx_dma_run()
318             return s->chan[channel].cmd;  in pxa2xx_dma_read()
418                 s->chan[channel].cmd = value;  in pxa2xx_dma_write()
536         VMSTATE_UINT32(cmd, PXA2xxDMAChannel),