Lines Matching refs:value
371 uint8_t value[4]; in omap_dma_transfer_generic() local
383 cpu_physical_memory_read(a->src, value, ch->data_type); in omap_dma_transfer_generic()
385 *(uint32_t *) value = ch->color; in omap_dma_transfer_generic()
387 if (!ch->transparent_copy || *(uint32_t *) value != ch->color) in omap_dma_transfer_generic()
388 cpu_physical_memory_write(a->dest, value, ch->data_type); in omap_dma_transfer_generic()
747 struct omap_dma_channel_s *ch, int reg, uint16_t *value)
751 *value = (ch->burst[1] << 14) |
762 *value = 0 << 10; /* FIFO_FLUSH reads as 0 */
764 *value = ch->omap_3_1_compatible_disable << 10;
765 *value |= (ch->mode[1] << 14) |
776 *value = ch->interrupts;
780 *value = ch->status;
783 *value |= (ch->sibling->status & 0x3f) << 6;
790 *value = ch->addr[0] & 0x0000ffff;
794 *value = ch->addr[0] >> 16;
798 *value = ch->addr[1] & 0x0000ffff;
802 *value = ch->addr[1] >> 16;
806 *value = ch->elements;
810 *value = ch->frames;
814 *value = ch->frame_index[0];
818 *value = ch->element_index[0];
823 *value = ch->active_set.src & 0xffff; /* CSAC */
825 *value = ch->cpc;
829 *value = ch->active_set.dest & 0xffff; /* CDAC */
833 *value = ch->element_index[1];
837 *value = ch->frame_index[1];
841 *value = ch->color & 0xffff;
845 *value = ch->color >> 16;
849 *value = (ch->bs << 2) |
855 *value = (ch->link_enabled << 15) |
860 *value = (ch->interleave_disabled << 15) |
871 struct omap_dma_channel_s *ch, int reg, uint16_t value)
875 ch->burst[1] = (value & 0xc000) >> 14;
876 ch->pack[1] = (value & 0x2000) >> 13;
877 ch->port[1] = (enum omap_dma_port) ((value & 0x1e00) >> 9);
878 ch->burst[0] = (value & 0x0180) >> 7;
879 ch->pack[0] = (value & 0x0040) >> 6;
880 ch->port[0] = (enum omap_dma_port) ((value & 0x003c) >> 2);
889 ch->data_type = 1 << (value & 3);
890 if ((value & 3) == 3) {
898 ch->mode[1] = (omap_dma_addressing_t) ((value & 0xc000) >> 14);
899 ch->mode[0] = (omap_dma_addressing_t) ((value & 0x3000) >> 12);
900 ch->end_prog = (value & 0x0800) >> 11;
902 ch->omap_3_1_compatible_disable = (value >> 10) & 0x1;
903 ch->repeat = (value & 0x0200) >> 9;
904 ch->auto_init = (value & 0x0100) >> 8;
905 ch->priority = (value & 0x0040) >> 6;
906 ch->fs = (value & 0x0020) >> 5;
907 ch->sync = value & 0x001f;
909 if (value & 0x0080)
920 ch->interrupts = value & 0x3f;
929 ch->addr[0] |= value;
934 ch->addr[0] |= (uint32_t) value << 16;
939 ch->addr[1] |= value;
944 ch->addr[1] |= (uint32_t) value << 16;
948 ch->elements = value;
952 ch->frames = value;
956 ch->frame_index[0] = (int16_t) value;
960 ch->element_index[0] = (int16_t) value;
968 ch->element_index[1] = (int16_t) value;
972 ch->frame_index[1] = (int16_t) value;
977 ch->color |= value;
982 ch->color |= (uint32_t)value << 16;
986 ch->bs = (value >> 2) & 0x1;
987 ch->transparent_copy = (value >> 1) & 0x1;
988 ch->constant_fill = value & 0x1;
992 ch->link_enabled = (value >> 15) & 0x1;
993 if (value & (1 << 14)) { /* Stop_Lnk */
997 ch->link_next_ch = value & 0x1f;
1001 ch->interleave_disabled = (value >> 15) & 0x1;
1002 ch->type = value & 0xf;
1012 uint16_t value)
1016 s->brust_f2 = (value >> 14) & 0x3;
1017 s->pack_f2 = (value >> 13) & 0x1;
1018 s->data_type_f2 = (1 << ((value >> 11) & 0x3));
1019 s->brust_f1 = (value >> 7) & 0x3;
1020 s->pack_f1 = (value >> 6) & 0x1;
1021 s->data_type_f1 = (1 << ((value >> 0) & 0x3));
1025 s->mode_f2 = (value >> 14) & 0x3;
1026 s->mode_f1 = (value >> 12) & 0x3;
1027 s->end_prog = (value >> 11) & 0x1;
1028 s->omap_3_1_compatible_disable = (value >> 10) & 0x1;
1029 s->repeat = (value >> 9) & 0x1;
1030 s->auto_init = (value >> 8) & 0x1;
1031 s->running = (value >> 7) & 0x1;
1032 s->priority = (value >> 6) & 0x1;
1033 s->bs = (value >> 4) & 0x1;
1037 s->dst = (value >> 8) & 0x1;
1038 s->src = ((value >> 6) & 0x3) << 1;
1041 s->interrupts = (value >> 1) & 1;
1042 s->dual = value & 1;
1047 s->src_f1_top |= 0x0000ffff & value;
1052 s->src_f1_top |= (uint32_t)value << 16;
1057 s->src_f1_bottom |= 0x0000ffff & value;
1062 s->src_f1_bottom |= (uint32_t) value << 16;
1067 s->src_f2_top |= 0x0000ffff & value;
1072 s->src_f2_top |= (uint32_t) value << 16;
1077 s->src_f2_bottom |= 0x0000ffff & value;
1082 s->src_f2_bottom |= (uint32_t) value << 16;
1086 s->element_index_f1 = value;
1091 s->frame_index_f1 |= 0x0000ffff & value;
1096 s->frame_index_f1 |= (uint32_t) value << 16;
1100 s->element_index_f2 = value;
1105 s->frame_index_f2 |= 0x0000ffff & value;
1110 s->frame_index_f2 |= (uint32_t) value << 16;
1114 s->elements_f1 = value;
1118 s->frames_f1 = value;
1122 s->elements_f2 = value;
1126 s->frames_f2 = value;
1130 s->lch_type = value & 0xf;
1256 uint16_t value)
1260 s->src = (value & 0x40) ? imif : emiff;
1263 s->interrupts = (value >> 1) & 1;
1264 s->dual = value & 1;
1269 s->src_f1_top |= 0x0000ffff & value;
1274 s->src_f1_top |= (uint32_t)value << 16;
1279 s->src_f1_bottom |= 0x0000ffff & value;
1284 s->src_f1_bottom |= (uint32_t)value << 16;
1289 s->src_f2_top |= 0x0000ffff & value;
1294 s->src_f2_top |= (uint32_t)value << 16;
1299 s->src_f2_bottom |= 0x0000ffff & value;
1304 s->src_f2_bottom |= (uint32_t)value << 16;
1365 static int omap_dma_sys_write(struct omap_dma_s *s, int offset, uint16_t value)
1369 s->gcr = value;
1373 if (value & 0x8)
1380 if (value & 0x1)
1505 uint64_t value, unsigned size)
1511 omap_badwidth_write16(opaque, addr, value);
1518 if (omap_dma_3_1_lcd_write(&s->lcd_ch, addr, value))
1526 if (omap_dma_ch_reg_write(s, &s->ch[ch], reg, value))
1535 if (omap_dma_sys_write(s, addr, value))
1541 if (omap_dma_3_2_lcd_write(&s->lcd_ch, addr, value))
1859 uint64_t value, unsigned size)
1866 omap_badwidth_write16(opaque, addr, value);
1881 s->irqstat[irqn] &= ~value;
1896 s->irqen[irqn] = value;
1900 if (value & 2) /* SOFTRESET */
1902 s->ocp = value & 0x3321;
1910 s->gcr = value & 0x00ff00ff;
1911 if ((value & 0xff) == 0x00) { /* MAX_CHANNEL_FIFO_DEPTH */
1941 ch->buf_disable = (value >> 25) & 1;
1942 ch->src_sync = (value >> 24) & 1; /* XXX For CamDMA must be 1 */
1948 ch->prefetch = (value >> 23) & 1;
1949 ch->bs = (value >> 18) & 1;
1950 ch->transparent_copy = (value >> 17) & 1;
1951 ch->constant_fill = (value >> 16) & 1;
1952 ch->mode[1] = (omap_dma_addressing_t) ((value & 0xc000) >> 14);
1953 ch->mode[0] = (omap_dma_addressing_t) ((value & 0x3000) >> 12);
1954 ch->suspend = (value & 0x0100) >> 8;
1955 ch->priority = (value & 0x0040) >> 6;
1956 ch->fs = (value & 0x0020) >> 5;
1962 ch->sync = (value & 0x001f) | ((value >> 14) & 0x0060);
1965 if (value & 0x0080)
1973 ch->link_enabled = (value >> 15) & 0x1;
1974 ch->link_next_ch = value & 0x1f;
1978 ch->interrupts = value & 0x09be;
1982 ch->cstatus &= ~value;
1986 ch->endian[0] =(value >> 21) & 1;
1987 ch->endian_lock[0] =(value >> 20) & 1;
1988 ch->endian[1] =(value >> 19) & 1;
1989 ch->endian_lock[1] =(value >> 18) & 1;
1995 ch->write_mode = (value >> 16) & 3;
1996 ch->burst[1] = (value & 0xc000) >> 14;
1997 ch->pack[1] = (value & 0x2000) >> 13;
1998 ch->translate[1] = (value & 0x1e00) >> 9;
1999 ch->burst[0] = (value & 0x0180) >> 7;
2000 ch->pack[0] = (value & 0x0040) >> 6;
2001 ch->translate[0] = (value & 0x003c) >> 2;
2007 ch->data_type = 1 << (value & 3);
2008 if ((value & 3) == 3) {
2017 ch->elements = value & 0xffffff;
2021 ch->frames = value & 0xffff;
2026 ch->addr[0] = (hwaddr) (uint32_t) value;
2031 ch->addr[1] = (hwaddr) (uint32_t) value;
2036 ch->element_index[0] = (int16_t) value;
2041 ch->frame_index[0] = (int32_t) value;
2046 ch->element_index[1] = (int16_t) value;
2051 ch->frame_index[1] = (int32_t) value;
2057 ch->color = value;