Lines Matching +full:d +full:- +full:- +full:- +full:- +full:- +full:1
4 * Copyright (c) 2003-2004 Vassili Karpov (malc)
27 #include "hw/qdev-properties.h"
31 #include "qemu/main-loop.h"
49 #define COUNT 1
68 static const int channels[8] = {-1, 2, 3, 1, -1, -1, -1, 0};
72 I8257State *d = opaque; in i8257_write_page() local
76 if (-1 == ichan) { in i8257_write_page()
80 d->regs[ichan].page = data; in i8257_write_page()
85 I8257State *d = opaque; in i8257_write_pageh() local
89 if (-1 == ichan) { in i8257_write_pageh()
93 d->regs[ichan].pageh = data; in i8257_write_pageh()
98 I8257State *d = opaque; in i8257_read_page() local
102 if (-1 == ichan) { in i8257_read_page()
106 return d->regs[ichan].page; in i8257_read_page()
111 I8257State *d = opaque; in i8257_read_pageh() local
115 if (-1 == ichan) { in i8257_read_pageh()
119 return d->regs[ichan].pageh; in i8257_read_pageh()
122 static inline void i8257_init_chan(I8257State *d, int ichan) in i8257_init_chan() argument
126 r = d->regs + ichan; in i8257_init_chan()
127 r->now[ADDR] = r->base[ADDR] << d->dshift; in i8257_init_chan()
128 r->now[COUNT] = 0; in i8257_init_chan()
131 static inline int i8257_getff(I8257State *d) in i8257_getff() argument
135 ff = d->flip_flop; in i8257_getff()
136 d->flip_flop = !ff; in i8257_getff()
142 I8257State *d = opaque; in i8257_read_chan() local
146 iport = (nport >> d->dshift) & 0x0f; in i8257_read_chan()
147 ichan = iport >> 1; in i8257_read_chan()
148 nreg = iport & 1; in i8257_read_chan()
149 r = d->regs + ichan; in i8257_read_chan()
151 dir = ((r->mode >> 5) & 1) ? -1 : 1; in i8257_read_chan()
152 ff = i8257_getff(d); in i8257_read_chan()
154 val = (r->base[COUNT] << d->dshift) - r->now[COUNT]; in i8257_read_chan()
156 val = r->now[ADDR] + r->now[COUNT] * dir; in i8257_read_chan()
158 ldebug ("read_chan %#x -> %d\n", iport, val); in i8257_read_chan()
159 return (val >> (d->dshift + (ff << 3))) & 0xff; in i8257_read_chan()
165 I8257State *d = opaque; in i8257_write_chan() local
169 iport = (nport >> d->dshift) & 0x0f; in i8257_write_chan()
170 ichan = iport >> 1; in i8257_write_chan()
171 nreg = iport & 1; in i8257_write_chan()
172 r = d->regs + ichan; in i8257_write_chan()
173 if (i8257_getff(d)) { in i8257_write_chan()
174 r->base[nreg] = (r->base[nreg] & 0xff) | ((data << 8) & 0xff00); in i8257_write_chan()
175 i8257_init_chan(d, ichan); in i8257_write_chan()
177 r->base[nreg] = (r->base[nreg] & 0xff00) | (data & 0xff); in i8257_write_chan()
184 I8257State *d = opaque; in i8257_write_cont() local
187 iport = (nport >> d->dshift) & 0x0f; in i8257_write_cont()
195 d->command = data; in i8257_write_cont()
201 d->status |= 1 << (ichan + 4); in i8257_write_cont()
204 d->status &= ~(1 << (ichan + 4)); in i8257_write_cont()
206 d->status &= ~(1 << ichan); in i8257_write_cont()
207 i8257_dma_run(d); in i8257_write_cont()
212 d->mask |= 1 << (data & 3); in i8257_write_cont()
214 d->mask &= ~(1 << (data & 3)); in i8257_write_cont()
215 i8257_dma_run(d); in i8257_write_cont()
225 ai = (data >> 4) & 1; in i8257_write_cont()
226 dir = (data >> 5) & 1; in i8257_write_cont()
229 linfo ("ichan %d, op %d, ai %d, dir %d, opmode %d\n", in i8257_write_cont()
233 d->regs[ichan].mode = data; in i8257_write_cont()
238 d->flip_flop = 0; in i8257_write_cont()
242 d->flip_flop = 0; in i8257_write_cont()
243 d->mask = ~0; in i8257_write_cont()
244 d->status = 0; in i8257_write_cont()
245 d->command = 0; in i8257_write_cont()
249 d->mask = 0; in i8257_write_cont()
250 i8257_dma_run(d); in i8257_write_cont()
254 d->mask = data; in i8257_write_cont()
255 i8257_dma_run(d); in i8257_write_cont()
265 linfo ("write_cont: nport %#06x, ichan % 2d, val %#06x\n", in i8257_write_cont()
273 I8257State *d = opaque; in i8257_read_cont() local
276 iport = (nport >> d->dshift) & 0x0f; in i8257_read_cont()
279 val = d->status; in i8257_read_cont()
280 d->status &= 0xf0; in i8257_read_cont()
283 val = d->mask; in i8257_read_cont()
296 I8257State *d = I8257(obj); in i8257_dma_has_autoinitialization() local
297 return (d->regs[nchan & 3].mode >> 4) & 1; in i8257_dma_has_autoinitialization()
302 I8257State *d = I8257(obj); in i8257_dma_hold_DREQ() local
306 d->status |= 1 << (ichan + 4); in i8257_dma_hold_DREQ()
307 i8257_dma_run(d); in i8257_dma_hold_DREQ()
312 I8257State *d = I8257(obj); in i8257_dma_release_DREQ() local
316 d->status &= ~(1 << (ichan + 4)); in i8257_dma_release_DREQ()
317 i8257_dma_run(d); in i8257_dma_release_DREQ()
320 static void i8257_channel_run(I8257State *d, int ichan) in i8257_channel_run() argument
322 int ncont = d->dshift; in i8257_channel_run()
324 I8257Regs *r = &d->regs[ichan]; in i8257_channel_run()
328 dir = (r->mode >> 5) & 1; in i8257_channel_run()
329 opmode = (r->mode >> 6) & 3; in i8257_channel_run()
334 if (opmode != 1) { in i8257_channel_run()
339 n = r->transfer_handler (r->opaque, ichan + (ncont << 2), in i8257_channel_run()
340 r->now[COUNT], (r->base[COUNT] + 1) << ncont); in i8257_channel_run()
341 r->now[COUNT] = n; in i8257_channel_run()
342 ldebug ("dma_pos %d size %d\n", n, (r->base[COUNT] + 1) << ncont); in i8257_channel_run()
343 if (n == (r->base[COUNT] + 1) << ncont) { in i8257_channel_run()
345 d->status |= (1 << ichan); in i8257_channel_run()
351 I8257State *d = opaque; in i8257_dma_run() local
355 if (d->running) { in i8257_dma_run()
356 rearm = 1; in i8257_dma_run()
359 d->running = 1; in i8257_dma_run()
365 mask = 1 << ichan; in i8257_dma_run()
367 if ((0 == (d->mask & mask)) && (0 != (d->status & (mask << 4)))) { in i8257_dma_run()
368 i8257_channel_run(d, ichan); in i8257_dma_run()
369 rearm = 1; in i8257_dma_run()
373 d->running = 0; in i8257_dma_run()
376 qemu_bh_schedule_idle(d->dma_bh); in i8257_dma_run()
377 d->dma_bh_scheduled = true; in i8257_dma_run()
385 I8257State *d = I8257(obj); in i8257_dma_register_channel() local
391 r = d->regs + ichan; in i8257_dma_register_channel()
392 r->transfer_handler = transfer_handler; in i8257_dma_register_channel()
393 r->opaque = opaque; in i8257_dma_register_channel()
398 return (r->mode & 0x0c) == 0; in i8257_is_verify_transfer()
404 I8257State *d = I8257(obj); in i8257_dma_read_memory() local
405 I8257Regs *r = &d->regs[nchan & 3]; in i8257_dma_read_memory()
406 hwaddr addr = ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now[ADDR]; in i8257_dma_read_memory()
412 if (r->mode & 0x20) { in i8257_dma_read_memory()
416 cpu_physical_memory_read (addr - pos - len, buf, len); in i8257_dma_read_memory()
418 for (i = 0; i < len >> 1; i++) { in i8257_dma_read_memory()
419 uint8_t b = p[len - i - 1]; in i8257_dma_read_memory()
433 I8257Regs *r = &s->regs[nchan & 3]; in i8257_dma_write_memory()
434 hwaddr addr = ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now[ADDR]; in i8257_dma_write_memory()
440 if (r->mode & 0x20) { in i8257_dma_write_memory()
444 cpu_physical_memory_write (addr - pos - len, buf, len); in i8257_dma_write_memory()
447 uint8_t b = p[len - i - 1]; in i8257_dma_write_memory()
462 I8257State *d = I8257(obj); in i8257_dma_schedule() local
463 if (d->dma_bh_scheduled) { in i8257_dma_schedule()
470 I8257State *d = I8257(dev); in i8257_reset() local
471 i8257_write_cont(d, (0x05 << d->dshift), 0, 1); in i8257_reset()
487 .min_access_size = 1,
488 .max_access_size = 1,
494 { 0x01, 3, 1, .write = i8257_write_page, .read = i8257_read_page, },
495 { 0x07, 1, 1, .write = i8257_write_page, .read = i8257_read_page, },
501 { 0x01, 3, 1, .write = i8257_write_pageh, .read = i8257_read_pageh, },
502 { 0x07, 3, 1, .write = i8257_write_pageh, .read = i8257_read_pageh, },
511 .min_access_size = 1,
512 .max_access_size = 1,
518 .version_id = 1,
519 .minimum_version_id = 1,
534 I8257State *d = opaque; in i8257_post_load() local
535 i8257_dma_run(d); in i8257_post_load()
542 .version_id = 1,
543 .minimum_version_id = 1,
550 VMSTATE_STRUCT_ARRAY(regs, I8257State, 4, 1, vmstate_i8257_regs,
559 I8257State *d = I8257(dev); in i8257_realize() local
562 memory_region_init_io(&d->channel_io, OBJECT(dev), &channel_io_ops, d, in i8257_realize()
563 "dma-chan", 8 << d->dshift); in i8257_realize()
565 d->base, &d->channel_io); in i8257_realize()
567 isa_register_portio_list(isa, &d->portio_page, in i8257_realize()
568 d->page_base, page_portio_list, d, in i8257_realize()
569 "dma-page"); in i8257_realize()
570 if (d->pageh_base >= 0) { in i8257_realize()
571 isa_register_portio_list(isa, &d->portio_pageh, in i8257_realize()
572 d->pageh_base, pageh_portio_list, d, in i8257_realize()
573 "dma-pageh"); in i8257_realize()
576 memory_region_init_io(&d->cont_io, OBJECT(isa), &cont_io_ops, d, in i8257_realize()
577 "dma-cont", 8 << d->dshift); in i8257_realize()
579 d->base + (8 << d->dshift), &d->cont_io); in i8257_realize()
581 for (i = 0; i < ARRAY_SIZE(d->regs); ++i) { in i8257_realize()
582 d->regs[i].transfer_handler = i8257_phony_handler; in i8257_realize()
585 d->dma_bh = qemu_bh_new(i8257_dma_run, d); in i8257_realize()
590 DEFINE_PROP_INT32("page-base", I8257State, page_base, 0x80),
591 DEFINE_PROP_INT32("pageh-base", I8257State, pageh_base, 0x480),
601 dc->realize = i8257_realize; in i8257_class_init()
603 dc->vmsd = &vmstate_i8257; in i8257_class_init()
606 idc->has_autoinitialization = i8257_dma_has_autoinitialization; in i8257_class_init()
607 idc->read_memory = i8257_dma_read_memory; in i8257_class_init()
608 idc->write_memory = i8257_dma_write_memory; in i8257_class_init()
609 idc->hold_DREQ = i8257_dma_hold_DREQ; in i8257_class_init()
610 idc->release_DREQ = i8257_dma_release_DREQ; in i8257_class_init()
611 idc->schedule = i8257_dma_schedule; in i8257_class_init()
612 idc->register_channel = i8257_dma_register_channel; in i8257_class_init()
614 dc->user_creatable = false; in i8257_class_init()
638 DeviceState *d; in type_init() local
642 d = DEVICE(isa1); in type_init()
643 qdev_prop_set_int32(d, "base", 0x00); in type_init()
644 qdev_prop_set_int32(d, "page-base", 0x80); in type_init()
645 qdev_prop_set_int32(d, "pageh-base", high_page_enable ? 0x480 : -1); in type_init()
646 qdev_prop_set_int32(d, "dshift", 0); in type_init()
651 d = DEVICE(isa2); in type_init()
652 qdev_prop_set_int32(d, "base", 0xc0); in type_init()
653 qdev_prop_set_int32(d, "page-base", 0x88); in type_init()
654 qdev_prop_set_int32(d, "pageh-base", high_page_enable ? 0x488 : -1); in type_init()
655 qdev_prop_set_int32(d, "dshift", 1); in type_init()