Lines Matching refs:guest_slots

1312     guest_start = le64_to_cpu(d->guest_slots[slot_id].slot.mem_start);  in qxl_add_memslot()
1313 guest_end = le64_to_cpu(d->guest_slots[slot_id].slot.mem_end); in qxl_add_memslot()
1377 d->guest_slots[slot_id].mr = mr; in qxl_add_memslot()
1378 d->guest_slots[slot_id].offset = memslot.virt_start - virt_start; in qxl_add_memslot()
1379 d->guest_slots[slot_id].size = memslot.virt_end - memslot.virt_start; in qxl_add_memslot()
1380 d->guest_slots[slot_id].delta = delta; in qxl_add_memslot()
1381 d->guest_slots[slot_id].active = 1; in qxl_add_memslot()
1388 d->guest_slots[slot_id].active = 0; in qxl_del_memslot()
1394 memset(&d->guest_slots, 0, sizeof(d->guest_slots)); in qxl_reset_memslots()
1419 if (!qxl->guest_slots[slot].active) { in qxl_get_check_slot_offset()
1423 if (offset < qxl->guest_slots[slot].delta) { in qxl_get_check_slot_offset()
1426 slot, offset, qxl->guest_slots[slot].delta); in qxl_get_check_slot_offset()
1429 offset -= qxl->guest_slots[slot].delta; in qxl_get_check_slot_offset()
1430 if (offset > qxl->guest_slots[slot].size) { in qxl_get_check_slot_offset()
1433 slot, offset, qxl->guest_slots[slot].size); in qxl_get_check_slot_offset()
1436 size_available = memory_region_size(qxl->guest_slots[slot].mr); in qxl_get_check_slot_offset()
1437 if (qxl->guest_slots[slot].offset + offset >= size_available) { in qxl_get_check_slot_offset()
1440 slot, qxl->guest_slots[slot].offset + offset, in qxl_get_check_slot_offset()
1444 size_available -= qxl->guest_slots[slot].offset + offset; in qxl_get_check_slot_offset()
1475 ptr = memory_region_get_ram_ptr(qxl->guest_slots[slot].mr); in qxl_phys2virt()
1476 ptr += qxl->guest_slots[slot].offset; in qxl_phys2virt()
1593 d->guest_slots[0].slot = slot; in qxl_set_mode()
1780 if (d->guest_slots[val].active) {
1785 d->guest_slots[val].slot = d->ram->mem_slot;
1945 qxl_set_dirty(qxl->guest_slots[slot].mr,
1946 qxl->guest_slots[slot].offset + offset,
1947 qxl->guest_slots[slot].offset + offset + size);
2306 if (!d->guest_slots[i].active) {
2392 VMSTATE_UINT64(slot.mem_start, struct guest_slots),
2393 VMSTATE_UINT64(slot.mem_end, struct guest_slots),
2394 VMSTATE_UINT32(active, struct guest_slots),
2444 VMSTATE_STRUCT_ARRAY(guest_slots, PCIQXLDevice, NUM_MEMSLOTS, 0,
2445 qxl_memslot, struct guest_slots),